74LVC1G80GM,132

74LVC1G80 Single D-type flip-flop positive-edge trigger Rev. 12 2 July 2012 Product data sheet 1. General description The 74LVC1G80 provides a single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using I . The I OFF OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V =3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C.74LVC1G80 NXP Semiconductors Single D-type flip-flop positive-edge trigger 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G80GW 40 Cto+125 C TSSOP5 plastic thin shrink small outline package SOT353-1 5 leads body width 1.25 mm 74LVC1G80GV 40 Cto+125 C SC-74A plastic surface-mounted package 5 leads SOT753 74LVC1G80GM 40 Cto+125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC1G80GF 40 C to +125 C XSON6 plastic extremely thin small outline package SOT891 no leads 6 terminals body 1 1 0.5 mm 74LVC1G80GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC1G80GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74LVC1G80GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely SOT1226 thin small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking codes 1 Type number Marking 74LVC1G80GW VT 74LVC1G80GV V80 74LVC1G80GM VT 74LVC1G80GF VT 74LVC1G80GN VT 74LVC1G80GS VT 74LVC1G80GX VT 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1D4Q 1 D 4 2 CP 2 CP 001aac523 mna649 Fig 1. Logic symbol Fig 2. IEC logic symbol 74LVC1G80 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 12 2 July 2012 2 of 21