MEC1308-NU

MEC1308 Keyboard and Embedded Controller for Notebook PC - Thirty-Two 8-Bit, Host/8051 Mailbox Regis- Features ters 3.3V Operation with 5V Tolerant Buffers on PS/2 - Sixty-Four Maskable Hardware Wake-Up pins Events ACPI 1.0/2.0 PC99/PC2001 Compliant - Fast GATEA20 LPC Interface with Clock Run Support - Fast CPU RESET - Serial IRQ Interface Compatible with Serial- - Multiple Clock Sources and Operating Fre- ized IRQ Support for PCI Systems quencies - 15 Direct IRQs - IDLE and SLEEP Modes - ACPI SCI Interface Accurate Fail-Safe Ring Oscillator - nSMI output and supporting PM registers - Single Clock source for most 8051 and SIO - Shadowed write only registers functions Internal 64K SRAM - Provides 2% frequency accuracy - Loaded at VCC1 power from the HOST/8051 - Lock Bit provides status SPI Memory Interface Integrated Standby Power Reset Generator - Provides 64KB of 8051 program space - VCC1 RST output - 32k-Byte region shared with 8051data space VCC0 Backed Resources HOST/8051 SPI Memory Interface - 16 Byte VCC0 Backed Registers - 3-pin Full Duplex serial communication inter- - VCC0 Backed Status Register face. - 32.768KHz-input clock - Two Chip Select Pins -<2A Standby Current (typ) - Fully 8051 Controlled 2 Two 8584-Style I C/SMBus Controllers - Hardware Support for two SPI Flash Configu- 2 - 8051 Controlled Logic Allows I C/SMBus rations: Master or Slave Operation - Switched SPI Flash Configuration 2 -I C/SMBus Controllers are Fully Operational - Parallel Shared SPI Flash Configuration on Standby Power Two Power Planes 2 - 2 Sets of Dedicated Pins per I C/SMBus - Low Standby Current in Sleep Mode Controller ACPI Embedded Controller Interface Four independent Hardware Driven PS/2 Ports Configuration Register Set Compatible with ISA 48 General Purpose I/O Pins Plug-and-Play Standard (Version 1.0a) - Maskable Hardware Wake-Event Capable High-Performance Embedded 8051 Keyboard - Programmable Open-Drain/Push-Pull Out- and System Controller puts - Provides System Power Management 7 General-Purpose Outputs - System Watch Dog Timer (WDT) Four Programmable Pulse-Width Modulator Out- - 8042 Style Host Interface puts - Supports Interrupt and Polling Access - Independent Clock Rates - 1024 Boot /ROM - 6-Bit Duty Cycle Granularity - 256 Bytes Data RAM - Operational in both Full on and Standby - On-Chip Memory-Mapped Control Registers modes - Access to VCC0 Backed Registers Consumer Infrared Receiver for Vista (CIRV) - Up to 18x8 Keyboard Scan Matrix - Consumer Infrared Remote Control Receiver - Two 16-Bit Timer/Counters Interface - Integrated Full-Duplex Serial Port Interface - Support of all common CIR formats in S0 - Seventy-Three 8051 Interrupt Sources power state, per Vista standard mechanism. 2014 Microchip Technology Inc. DS00001753A-page 1MEC1308 - Hardware matching of Microsoft Remote Description input frames, with PME Wake (S3/S4/S5 The MEC1308 is a 128-pin 3.3V LPC-based ACPI 2.0 power states). and PC99/PC2001 compliant Notebook I/O Controller. - Programmable High-Speed Synchronous See Figure 1,MEC1308 Block Diagra. Communications Engine (SCE) with a 32- The MEC1308 incorporates a high-performance 8051- Byte FIFO and Programmable Threshold based keyboard and system controller with internal 64k - LED Control for Activity Indication byte RAM a 1K byte Boot ROM, and 16-bytes battery Dual Fan Tachometer Inputs backed registers. The 64K RAM is loaded via HOST/ Debug Port (UART) 8051 SPI Memory Interface. The HOST/8051 SPI - High-Speed 16550A-Compatible UART with Memory Interface can be configured in Switched SPI 16-Byte Send/Receive FIFOs Flash Configuration or Parallel Shared SPI Flash Con- - Programmable Baud Rate Generator figuration. - Relocatable to 480 Different Base I/O The MEC1308 has four PS/2 ports an 16C550A-com- Addresses patible 2 pin UART for Debug Port a Consumer Infra- 2 - 15 IRQ Options red Receiver for Vista (CIRV), two 8584-style I C/ SMBus controllers with two selectable ports per con- BC-Link Interconnection Bus troller a Serial IRQ peripheral agent interface an ACPI - Combined High Speed/Low Speed Bus Mas- Embedded Controller Interface forty-eight General ter Controller Purpose I/O pins and seven General Purpose Outputs General Purpose Analog to Digital Converter (GP- four independently programmable pulse width modula- ADC) tors dual fan control through the implementation of two - 10-bit conversion precision fan tachometer input pins hardware monitoring of a - 10-bit conversion per channel is completed in PWM input and maskable hardware wake-up events 10.91us one BC-Link Combined High Speed/Low Speed Bus - 4 ADC general purpose channels Master Controller 4 channel Analog to Digital Con- verter. - Channel 0 has a 5 volt tolerant input - 10-bit Conversion with 3.22 mV resolution The MEC1308 has two separate power planes to pro- - 0 to 3.3 VDC Conversion Range vide instant on and system power management func- - Channel 1, 2, & 3 has a 3.3 volt tolerant input tions. Additionally, the MEC1308 incorporates sophisticated power control circuitry (PCC). The PCC with a 10-bit, 3.22 mV resolution supports multiple low power down modes. Wake-up - Optional continuous sampling at a program- events and ACPI-related functions are supported mable rate through the SCI Interface. - Integral Non-Linearity of 0.5 LSB Dynamic The MEC1308 supports the ISA Plug-and-Play Stan- Non-Linearity of 0.5 LSB dard (Version 1.0a) and provides all the functionality for current Windows O/Ss. The I/O Address and Hard- ware IRQ of each logical device in the MEC1308 may be reprogrammed through the internal configuration registers. There are 480 I/O address location options and 15 IRQs for each logical device. DS00001753A-page 2 2014 Microchip Technology Inc.