Product Information

W971GG6KB25I

W971GG6KB25I electronic component of Winbond

Datasheet
DRAM Chip DDR2 SDRAM 1Gbit 64Mx16 1.8V 84-Pin WBGA

Manufacturer: Winbond
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

10: USD 6.5601 ea
Line Total: USD 65.6

0 - Global Stock
MOQ: 10  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 16 May to Wed. 22 May

MOQ : 10
Multiples : 1

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W971GG6KB25I
Winbond

10 : USD 6.5601
25 : USD 5.8631
50 : USD 5.702
100 : USD 5.3108

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Type
Access Time
Brand
Organization
Address Bus
Supply Current
Mounting
Operating Supply Voltage Max
Pin Count
Operating Supply Voltage Typ
Rad Hardened
Operating Temp Range
Operating Temperature Classification
Operating Supply Voltage Min
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W971GG6KB 8M 8 BANKS 16 BIT DDR2 SDRAM Table of Contents- 1. GENERAL DESCRIPTION ................................................................................................................... 4 2. FEATURES ........................................................................................................................................... 4 3. ORDER INFORMATION ....................................................................................................................... 4 4. KEY PARAMETERS ............................................................................................................................. 5 5. BALL CONFIGURATION ...................................................................................................................... 6 6. BALL DESCRIPTION ............................................................................................................................ 7 7. BLOCK DIAGRAM ................................................................................................................................ 8 8. FUNCTIONAL DESCRIPTION .............................................................................................................. 9 8.1 Power-up and Initialization Sequence ................................................................................................... 9 8.2 Mode Register and Extended Mode Registers Operation ................................................................... 10 8.2.1 Mode Register Set Command (MRS) ............................................................................... 10 8.2.2 Extend Mode Register Set Commands (EMRS) .............................................................. 11 8.2.2.1 Extend Mode Register Set Command (1), EMR (1) ................................................ 11 8.2.2.2 DLL Enable/Disable ................................................................................................ 12 8.2.2.3 Extend Mode Register Set Command (2), EMR (2) ................................................ 13 8.2.2.4 Extend Mode Register Set Command (3), EMR (3) ................................................ 14 8.2.3 Off-Chip Driver (OCD) Impedance Adjustment ................................................................ 15 8.2.3.1 Extended Mode Register for OCD Impedance Adjustment .................................... 16 8.2.3.2 OCD Impedance Adjust .......................................................................................... 16 8.2.3.3 Drive Mode ............................................................................................................. 17 8.2.4 On-Die Termination (ODT) ............................................................................................... 18 8.2.5 ODT related timings ......................................................................................................... 18 8.2.5.1 MRS command to ODT update delay ..................................................................... 18 8.3 Command Function ............................................................................................................................. 20 8.3.1 Bank Activate Command .................................................................................................. 20 8.3.2 Read Command ............................................................................................................... 21 8.3.3 Write Command ............................................................................................................... 21 8.3.4 Burst Read with Auto-precharge Command ..................................................................... 21 8.3.5 Burst Write with Auto-precharge Command ..................................................................... 21 8.3.6 Precharge All Command .................................................................................................. 21 8.3.7 Self Refresh Entry Command .......................................................................................... 21 8.3.8 Self Refresh Exit Command ............................................................................................. 22 8.3.9 Refresh Command ........................................................................................................... 22 8.3.10 No-Operation Command .................................................................................................. 23 8.3.11 Device Deselect Command .............................................................................................. 23 8.4 Read and Write access modes ........................................................................................................... 23 8.4.1 Posted CAS .................................................................................................................... 23 Publication Release Date: Sep. 11, 2013 - 1 - Revision A03 W971GG6KB 8.4.1.1 Examples of posted CAS operation ...................................................................... 23 8.4.2 Burst mode operation ....................................................................................................... 24 8.4.3 Burst read mode operation ............................................................................................... 25 8.4.4 Burst write mode operation .............................................................................................. 25 8.4.5 Write data mask ............................................................................................................... 26 8.5 Burst Interrupt ..................................................................................................................................... 26 8.6 Precharge operation ............................................................................................................................ 27 8.6.1 Burst read operation followed by precharge ..................................................................... 27 8.6.2 Burst write operation followed by precharge .................................................................... 27 8.7 Auto-precharge operation ................................................................................................................... 27 8.7.1 Burst read with Auto-precharge........................................................................................ 28 8.7.2 Burst write with Auto-precharge ....................................................................................... 28 8.8 Refresh Operation ............................................................................................................................... 29 8.9 Power Down Mode .............................................................................................................................. 29 8.9.1 Power Down Entry ........................................................................................................... 30 8.9.2 Power Down Exit .............................................................................................................. 30 8.10 Input clock frequency change during precharge power down ............................................................. 30 9. OPERATION MODE ........................................................................................................................... 31 9.1 Command Truth Table ........................................................................................................................ 31 9.2 Clock Enable (CKE) Truth Table for Synchronous Transitions............................................................ 32 9.3 Data Mask (DM) Truth Table ............................................................................................................... 32 9.4 Function Truth Table ........................................................................................................................... 33 9.5 Simplified Stated Diagram ................................................................................................................... 36 10. ELECTRICAL CHARACTERISTICS ................................................................................................... 37 10.1 Absolute Maximum Ratings................................................................................................................. 37 10.2 Operating Temperature Condition ....................................................................................................... 37 10.3 Recommended DC Operating Conditions ........................................................................................... 37 10.4 ODT DC Electrical Characteristics ...................................................................................................... 38 10.5 Input DC Logic Level ........................................................................................................................... 38 10.6 Input AC Logic Level ........................................................................................................................... 38 10.7 Capacitance ........................................................................................................................................ 39 10.8 Leakage and Output Buffer Characteristics ........................................................................................ 39 10.9 DC Characteristics .............................................................................................................................. 40 10.10 IDD Measurement Test Parameters .......................................................................................... 42 10.11 AC Characteristics ..................................................................................................................... 43 10.11.1 AC Characteristics and Operating Condition for -18 speed grade ................................... 43 10.11.2 AC Characteristics and Operating Condition for -25/25I/-3 speed grade ......................... 45 10.12 AC Input Test Conditions ........................................................................................................... 66 10.13 Differential Input/Output AC Logic Levels .................................................................................. 66 10.14 AC Overshoot / Undershoot Specification ................................................................................. 67 10.14.1 AC Overshoot / Undershoot Specification for Address and Control Pins: ........................ 67 10.14.2 AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pins: .......... 67 11. TIMING WAVEFORMS ....................................................................................................................... 68 Publication Release Date: Sep. 11, 2013 - 2 - Revision A03

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:
Winbond Elec
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA

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