P036F048T12AL-CB

End of Life PRM Regulator P036F048T12AL S CUNRTLS Non-isolated Regulator Features 36 V input VI Chip PRM Adaptive Loop feedback Vin = 18 60 Vdc Vin range 18 60 Vdc ZVS buck-boost regulator Vf = 26 55 Vdc Pf = 120 W 3 High density 407 W/in 1.35 MHz switching frequency If = 2.5 A 2 Small footprint 1.1 in 95% efficiency Low weight 0.5 oz (15 g) 125C operation (Tj) Product Description Absolute Maximum Ratings The VI Chip regulator is a very efficient non-isolated Parameter Values Unit Notes regulator capable of both boosting and bucking a wide +In to -In -1.0 to 85.0 Vdc range input voltage. It is specifically designed to provide PC to -In -0.3 to 6.0 Vdc a controlled Factorized Bus distribution voltage for PR to -In -0.3 to 9.0 Vdc powering downstream VTM Transformer fast, IL to -In -0.3 to 6.0 Vdc efficient, isolated, low noise Point-of-Load (POL) converters. In combination, PRMs and VTMs form a VC to -In -0.3 to 18.0 Vdc complete DC-DC converter subsystem offering all of the +Out to -Out -0.3 to 59 Vdc unique benefits of Vicors Factorized Power SC to -Out -0.3 to 3.0 Vdc TM TM Architecture (FPA) : high density and efficiency low VH to -Out -0.3 to 9.5 Vdc noise operation architectural flexibility extremely fast OS to -Out -0.3 to 9.0 Vdc transient response and elimination of bulk capacitance CD to -Out -0.3 to 9.0 Vdc at the Point-of-Load (POL). SG to -Out 100 mA In FPA systems, the POL voltage is the product of the Continuous output current 2.5 Adc Factorized Bus voltage delivered by the PRM and the Continuous output power 120 WK-facto (the fixed voltage transformation ratio) of a MSL 4 downstream VTM. The PRM controls the Factorized Bus Case temperature during reflow 245 C (Datecode 1528 voltage to provide regulation at the POL. Because VTMs and later) perform true voltage division and current multiplication, the Factorized Bus voltage may be set to a value that is Operating junction temperature -40 to 125 C T-Grade substantially higher than the bus voltages typically Storage temperature -40 to 125 C T-Grade found inintermediate bu systems, reducing distribution losses and enabling use of narrower DC-DC Converter distribution bus traces. A PRM-VTM chip set can provide up to 100 A, or 115 W at a FPA system density of 3 3 169 A/in , or 195 W/in and because the PRM can VC VH SC be located, orfactorized remotely from the POL, P C +Out Factorized +In 0.01 F TM SG IL OS these power densities can be effectively doubled. Bus (V ) NC F L NC ROS P R PRM -AL +Out CD 10 k Module RCD TM O The PRM described in this data sheet features a unique VTM VC +In +Out Module PC 0.4 H AAdaptive Loo compensation feedback: a single wire Out V IN 10 K alternative to traditional remote sensing and feedback D In Out In Out Ro loops that enables precise control of an isolated POL voltage without the need for either a direct connection to the load or for noise sensitive, bandwidth limiting, The P036F048T12AL is used with any 048 input series VTM to provide a regulated and isolation devices in the feedback path. isolated output. PRM Regulator Rev 2.1 vicorpower.com 800 927.9474 Page 1 of 14 09/2015Not Recommended for New Designs P036F048T12AL General Specifications Part Numbering P 036 F 048 T 12 AL Configuration Product Grade Temperatures (C) AL = Adaptive Loop Input Voltage Nominal Output Power Regulator F = J-lead Grade Storage Operating (T ) Designator Designator Factorized Bus J T = Through hole T -40 to125 -40 to125 Voltage (=P /10) f Overview of Adaptive Loop Compensation Adaptive Loop compensation, illustrated in Figure 1, contributes to the The VI Chips bi-directional VC port : bandwidth and speed advantage of Factorized Power. The PRM 1. Provides a wake up signal from the PRM to the VTM that monitors its output current and automatically adjusts its output voltage synchronizes the rise of the VTM output voltage to that of the PRM. to compensate for the voltage drop in the output resistance of the 2. Provides feedback from the VTM to the PRM to enable the PRM to VTM. R sets the desired value of the VTM output voltage, Vout R OS CD compensate for the voltage drop in VTM output resistance, R . O is set to a value that compensates for the output resistance of the VTM (which, ideally, is located at the point of load). For selection of R and OS R , refer to Table 1 below or Page 9. CD VC VH SC P C +Out Factorized +In 0.01 F SG TM IL OS Bus (V ) NC F L NC ROS P R PRM -AL +Out CD 10 k RCD TM Module O VTM VC +In +Out Module PC 0.4 H A Out V IN 10 K D In In Out Out Ro Figure 1 With Adaptive Loop control, the output of the VTM is regulated over the load current range with only a single interconnect between the PRM and VTM and without the need for isolation in the feedback path. (1) (2) (3) (3) Desired Load Voltage (Vdc) VTM P/N Max VTM Output Current (A) R (k) R () OS CD 1.0 V048F015T100 100 3.57 26.1 1.2 V048F015T100 100 2.94 32.4 1.5 V048F015T100 100 2.37 39.2 1.8 V048F020T080 80 2.61 35.7 2.0 V048F020T080 80 2.37 39.2 3.0 V048F030T070 70 2.37 39.2 3.3 V048F040T050 50 2.89 32.6 5.0 V048F060T040 40 2.87 33.2 8.0 V048F080T030 30 2.37 32.9 9.6 V048F096T025 25 2.37 32.9 10 V048F120T025 25 2.86 32.9 12 V048F120T025 25 2.37 39.2 15 V048F160T015 15 2.49 37.4 24 V048F240T012 12.5 2.37 39.2 28 V048F320T009 9.4 2.74 35.7 36 V048F480T006 6.3 3.16 30.1 48 V048F480T006 6.3 2.37 39.2 Note: (1) See Table 2 on page 9 for nominal Vout range and K factors. (2) See PRM output power vs. VTM output power on Page 10 (3) 1% precision resistors recommended Table 1 Configure your Chip Set using the PRM-AL PRM Regulator Rev 2.1 vicorpower.com 800 927.9474 Page 2 of 14 09/2015