P048T048T24AL

End of Life P048F048T24AL P048F048M24AL TM PRM Regulator TM 48 V input VI Chip PRM Adaptive Loop feedback Vin range 36 75 Vdc ZVS buck-boost regulator 3 Vin = 36 75 V High density 813 W/in 1.45 MHz switching frequency 2 Vf = 26 55 V Small footprint 215 W/in 96% Efficiency Pf = 240 W Low weight 0.5 oz (15 g) 125C operation (Tj) If = 5 A Product Description Absolute Maximum Ratings The VI Chip regulator is a very efficient non-isolated Parameter Values Unit Notes regulator capable of both boosting and bucking a wide range +In to -In -1.0 to 85.0 Vdc input voltage. It is specifically designed to provide a controlled PC to -In -0.3 to 6.0 Vdc Factorized Bus distribution voltage for powering downstream TM VTM Transformer fast, efficient, isolated, low noise PR to -In -0.3 to 9.0 Vdc Point-of-Load (POL) converters. In combination, PRMs and IL to -In -0.3 to 6.0 Vdc TM VTMs form a complete DC-DC converter subsystem VC to -In -0.3 to 18.0 Vdc offering all of the unique benefits of Vicors Factorized Power +Out to -Out -0.3 to 59 Vdc TM TM Architecture (FPA) : high density and efficiency low noise SC to -Out -0.3 to 3.0 Vdc operation architectural flexibility extremely fast transient response and elimination of bulk capacitance at the Point-of- VH to -Out -0.3 to 9.5 Vdc Load (POL). OS to -Out -0.3 to 9.0 Vdc In FPA systems, the POL voltage is the product of the CD to -Out -0.3 to 9.0 Vdc Factorized Bus voltage delivered by the PRM and the SG to -Out 100 mAK-facto (the fixed voltage transformation ratio) of a Continuous output current 5 Adc downstream VTM. The PRM controls the Factorized Bus Continuous output power 240 W voltage to provide regulation at the POL. Because VTMs 225 C MSL 5 perform true voltage division and current multiplication, Case temperature during reflow 245 C MSL 6 the Factorized Bus voltage may be set to a value that is substantially higher than the bus voltages typically found in -55 to 125 C M-Grade Operating junction temperatureintermediate bu systems, reducing distribution losses and -40 to 125 C T-Grade enabling use of narrower distribution bus traces. A PRM-VTM -65 to 125 C M-Grade chip set can provide up to 100 A or 230 W at a FPA system Storage temperature -40 to 125 C T-Grade 3 3 density of 169 A/in or 390 W/in and because the PRM can be located, orfactorized r emotely from the POL, these power densities can be effectively doubled. DC-DC Converter The PRM described in this data sheet features a uniqueAdaptive Loo compensation feedback: a single wire alternative to traditional remote sensing and feedback loops VH VC PC SC +Out that enables precise control of an isolated POL voltage Factorized 0.01 F SG +In TM IL OS without the need for either a direct connection to the load Bus (V ) F NC NC ROS L PR PRM -AL +Out CD or for noise sensitive, bandwidth limiting, isolation devices 10 k RCD TM Module O VTM VC +In +Out Module in the feedback path. PC 0.4 H A Out V IN 10 K D In In Out Out Ro P048F048T24AL is used with 048 input series VTM to provide a regulated & isolated output. vicorpower.com 800-735-6200 VI Chip Regulator P048F048T24AL Rev. 3.9 Page 1 of 14End of Life VI Chip Regulator General Specifications Part Numbering P 048 F 048 T 24 AL Input Voltage Configuration Product Grade Temperatures (C) AL = Adaptive Loop Nominal Output Power Regulator F = J-lead Grade Storage Operating (T ) Designator Factorized Bus J Designator T = Through hole T -40 to125 -40 to125 (=P /10) Voltage f M -65 to125 -55 to125 Overview of Adaptive Loop Compensation Adaptive Loop compensation, illustrated in Figure 1, contributes to the The VI Chips bi-directional VC port : bandwidth and speed advantage of Factorized Power. The PRM 1. Provides a wake up signal from the PRM to the VTM that monitors its output current and automatically adjusts its output voltage synchronizes the rise of the VTM output voltage to that of the PRM. to compensate for the voltage drop in the output resistance of the 2. Provides feedback from the VTM to the PRM to enable the PRM to VTM. R sets the desired value of the VTM output voltage, Vout R OS CD compensate for the voltage drop in VTM output resistance, R . O is set to a value that compensates for the output resistance of the VTM (which, ideally, is located at the point of load). For selection of R and OS R , refer to Table 1 below or Page 9. CD VC VH SC PC +Out Factorized +In 0.01 F TM SG IL OS Bus (V ) F L NC NC ROS PR PRM -AL +Out CD 10 k Module RCD TM O VTM VC +In +Out Module PC 0.4 H A Out V IN 10 K D In In Out Out Ro Figure 1 With Adaptive Loop control, the output of the VTM is regulated over the load current range with only a single interconnect between the PRM and VTM and without the need for isolation in the feedback path. (1) (2) (3) (3) Desired Load Voltage (Vdc) VTM P/N Max VTM Output Current (A) R (k) R () OS CD 1.0 V048F015T100 100 3.57 26.1 1.2 V048F015T100 100 2.94 32.4 1.5 V048F015T100 100 2.37 39.2 1.8 V048F020T080 80 2.61 35.7 2.0 V048F020T080 80 2.37 39.2 3.0 V048F030T070 70 2.37 39.2 3.3 V048F040T050 50 2.89 32.6 5.0 V048F060T040 40 2.87 33.2 8.0 V048F080T030 30 2.37 32.9 9.6 V048F096T025 25 2.37 32.9 10 V048F120T025 25 2.86 32.9 12 V048F120T025 25 2.37 39.2 15 V048F160T015 15 2.49 37.4 24 V048F240T012 12.5 2.37 39.2 28 V048F320T009 9.4 2.74 35.7 36 V048F480T006 6.3 3.16 30.1 48 V048F480T006 6.3 2.37 39.2 Note: (1) See Table 2 on page 9 for nominal Vout range and K factors. (2) See PRM output power vs. VTM output power on Page 10 (3) 1% precision resistors recommended Table 1 Configure your Chip Set using the PRM-AL vicorpower.com 800-735-6200 VI Chip Regulator P048F048T24AL Rev. 3.9 Page 2 of 14