Product Information

F0502NLGI

F0502NLGI electronic component of Renesas

Datasheet
RF Mixer DPD Mixer 0.25 UM SIGE BICMOS

Manufacturer: Renesas
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Price (USD)

1: USD 31.8024 ea
Line Total: USD 31.8

156 - Global Stock
Ships to you between
Tue. 21 May to Thu. 23 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
156 - WHS 1


Ships to you between Tue. 21 May to Thu. 23 May

MOQ : 1
Multiples : 1

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F0502NLGI
Renesas

1 : USD 25.875
10 : USD 24.265
25 : USD 23.1725
100 : USD 21.367
168 : USD 20.5735
504 : USD 20.0675
1008 : USD 19.5385
2520 : USD 19.4235
5040 : USD 19.4005

     
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Sampling IF Receiver 600MHz to F0502 1000MHz Datasheet FEATURES DESCRIPTION Dual Channel for Diversity / MIMO Systems This document describes the specifications for the F0502 TM TM Combines FlatNoise and Zero- Distortion 600MHz to 1000MHz dual path Sampling IF (SIF) technology Receiver used in Multi-mode, Multi-carrier BaseStation 28.2dB Total Power Gain Receivers. Refer to the Part Number Matrix below 47dB gain control range describing the frequency coverage of the complete series. 1dB Gain Steps This series is offered with high side or low side LO Ultra linear +44dBm IP3 O injection options for all UTRA bands and offers Low NF: 9.6dB at G MAX significantly better Noise and Distortion performance than currently available solutions. IF frequencies from 60MHz 50 input impedance to 275MHz are supported. Matched 100 differential output impedance Ultra high +20.2dBm P1dBo The F0502 SIF provides 28.2dB gain and offers 47dB Independent path standby mode gain adjustment in 1dB steps and is designed to operate Constant LO impedance in STBY mode with a single 5V supply. Nominally, the device offers 6 bit parallel control +44dBm Output IP3 using 480mA of ICC. Alternately one 60MHz to 275MHz IF frequency range can configure the device in low current (LC) mode to nd Excellent 2 Harmonic Rejection reduce power consumption to less than 1.95 watts. I = 480mA STD Mode, 390mA LC Mode CC This device is packaged in a 10x10 68-pin TQFN with 10 x 10 mm 68-pin VFQFPN package 50 single-ended RF input and 200 differential IF output impedances for ease of integration into the receiver lineup. The 200 differential IF output can easily be matched to 100 differential per the application drawing. DEVICE BLOCK DIAGRAM RF IFOUT A+ IN A COMPETITIVE ADVANTAGE TM IFOUT A - Renesas Zero-Distortion mixer in combination with 6 GAIN A 0 : 5 2 TDD ( STBY ) TM LO VCO Bias Decode 6 GAIN B 0 :5 interstage filtering and Renesas proprietary FlatNoise Logic Control LC Mode 2 I set DVGA improves system SNR to the point where the RF IFOUT B + IN B external SAW filter can be eliminated. Both IP3 and NF O IFOUT B - are kept virtually flat while gain is backed off, enhancing SNR significantly under high level interferer conditions, and greatly benefiting 2G/3G/4G Multi-Carrier IF sampling receivers. In addition, total power consumption is reduced by 35% compared to conventional solutions. No external SAW is needed PART NUMBER MATRIX Reduced Power Consumption by 35% Part RF Freq UTRA bands IF Freq Typ. Injection Range Range Gain (MHz) (MHz) (dB) NF and OIP3 virtually flat for first 13dB gain reduction 5,6,8,12,13,14,17 Low & F0502 600 - 1000 60 - 275 28.2 18,19,20 High Side The fast-settling, parallel mode gain step of 1.0 dB 1,2,3,4,9,10,23, Low & coupled with the excellent differential non-linearity allow F0552 1710 - 2050 25,33,34,35,36, 60 450 29 High Side 37,39 for SNR to be maximized further by targeting the minimum necessary gain in small, accurate increments. Low & F0562 2300 2700 7,38,40,41 60 450 29 High Side The matched output does not require a terminating resistor, thus the gain and distortion performance are preserved when driving Bandpass Anti-Alias filters. TM TM FlatNoise , Zero-Distortion , SIF Rx 1 February 8,2022 Sampling IF Receiver 600MHz to F0502 1000MHz Datasheet Table of Contents Absolute Maximum Ratings ................................................................................................................................... 3 F0502 Recommended Operating Conditions ........................................................................................................... 5 F0502 Specification............................................................................................................................................... 6 Typical Operating Conditions (184 MHz IF Center) .................................................................................................. 9 TOCs Max Gain, STD Mode, IF = 184MHz +/- 40MHz Gain, OIP3, OIP2 (-1-)....................................................... 10 TOCs Max Gain, STD Mode, IF = 184MHz +/- 40MHz 2x2, L-I, DC Current (-2-) .................................................. 11 TOCs Swept Gain, STD Mode, IF = 184MHz, HS Injection Gain, OIP3, IIP3 (-3-) ................................................. 12 TOCs Swept Gain, STD Mode, IF = 184MHz, HS Injection OIP2, IIP2, 2x2 (-4-) ................................................... 13 TOCs Swept Gain, STD Mode, IF = 184MHz, HS Injection 3x3, L-I, R-I (-5-)........................................................ 14 TOCs Swept Gain, LC Mode, RF=900MHz, IF = 184MHz, HS Injection Gain, OIP3, IIP3 (-6-) ................................ 15 TOCs Swept Gain, LC Mode, RF=900MHz, IF = 184MHz, HS Injection OIP2, Chan Iso, 2x2 (-7-) .......................... 16 TOCs Swept Gain, LC Mode, RF=900MHz, IF = 184MHz, HS Inj 3x3, L-I, DC Current, R-I (-8-) ............................ 17 Typical Operating Conditions 276 MHz IF Center ................................................................................................ 18 TOCs Swept Gain, STD Mode, IF = 276MHz, HS Injection Gain, OIP3, OIP2 (-9-) ................................................ 19 TOCs Swept Gain, STD Mode, IF = 276MHz, HS Injection 2x2, 3x3, Current, R-I, ISO (-10-) ............................... 20 Typical Operating Conditions (80 MHz IF Center) .................................................................................................. 21 TOCs Swept Gain, STD Mode, IF = 80MHz, HS Injection Gain, OIP3, OIP2 (-11-) ................................................ 22 TOCs Swept Gain, STD Mode, IF = 80MHz, HS Injection 2x2, 3x3, Current, R-I, ISO (-12-) ................................. 23 TOCs Return Loss STD Mode (-13-) .................................................................................................................. 24 TOCs Noise Figure, Gain Accuracy, P1dB STD Mode (-14-) ................................................................................. 25 TOCs M x N Spurs LO = 1.08182 GHz, T = 25C, > -90 dBc (-15-) .................................................................. 26 CASE TOCs Histograms N= 4584, T = 25C (-16-) .................................................................................................. 27 CASE Package Outline Drawings ................................................................................................................................... 28 Pin Diagram ....................................................................................................................................................... 28 Pin Description ................................................................................................................................................... 29 Pin Description (continued) ................................................................................................................................. 30 Digital Pin Voltage and Resistance Values ............................................................................................................ 31 EVKIT and Typical Application Schematic ............................................................................................................. 33 EVkit Picture ...................................................................................................................................................... 34 ......................................................................................................................................................................... 34 BOM 1 and 2 ...................................................................................................................................................... 35 IF Bias and Output Matching Circuit and BOM for Various IFs ................................................................................ 36 IF Network BOM for different frequencies ............................................................................................................ 37 Top Marking ....................................................................................................................................................... 37 Ordering Information .......................................................................................................................................... 37 Revision History.................................................................................................................................................. 37 TM TM FlatNoise , Zero-Distortion , SIF Rx 2 February 8,2022

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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