Product Information

MC74HC03ADTR2G

MC74HC03ADTR2G electronic component of ON Semiconductor

Datasheet
Logic Gates 2-6V Quad 2-Input NAND w/Open Drain

Manufacturer: ON Semiconductor
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Price (USD)

1: USD 0.0141 ea
Line Total: USD 0.01

2361 - Global Stock
Ships to you between
Fri. 03 May to Thu. 09 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2361 - Global Stock


Ships to you between Fri. 03 May to Thu. 09 May

MOQ : 1
Multiples : 1

Stock Image

MC74HC03ADTR2G
ON Semiconductor

1 : USD 0.0141
10 : USD 0.014
25 : USD 0.0129
100 : USD 0.0104
250 : USD 0.0101
500 : USD 0.0101
1000 : USD 0.0101

2361 - Global Stock


Ships to you between Fri. 03 May to Thu. 09 May

MOQ : 379
Multiples : 1

Stock Image

MC74HC03ADTR2G
ON Semiconductor

379 : USD 0.2163

     
Manufacturer
Product Category
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Hts Code
LoadingGif

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MC74HC03A Quad 2-Input NAND Gate with Open-Drain Outputs HighPerformance SiliconGate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs with pullup MC74HC03A MAXIMUM RATINGS Symbol Parameter Value Unit This device contains protection circuitry to guard against damage V DC Supply Voltage (Referenced to GND) 0.5 to + 7.0 V CC due to high static voltages or electric V DC Input Voltage (Referenced to GND) 0.5 to V + 0.5 V in CC fields. However, precautions must V DC Output Voltage (Referenced to GND) 0.5 to V + 0.5 V be taken to avoid applications of any out CC voltage higher than maximum rated I DC Input Current, per Pin 20 mA in voltages to this highimpedance cir- I DC Output Current, per Pin 25 mA out cuit. For proper operation, V and in I DC Supply Current, V and GND Pins 50 mA V should be constrained to the CC CC out range GND (V or V ) V . in out CC P Power Dissipation in Still Air SOIC Package 500 mW D Unused inputs must always be TSSOP Package 450 tied to an appropriate logic voltage T Storage Temperature 65 to + 150 C stg level (e.g., either GND or V ). CC Unused outputs must be left open. T Lead Temperature, 1 mm from Case for 10 Seconds C L SOIC or TSSOP Package 260 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating SOIC Package: 7 mW/C from 65 to 125C TSSOP Package: 6.1 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V DC Supply Voltage (Referenced to GND) 2.0 6.0 V CC V , V DC Input Voltage, Output Voltage (Referenced to GND) 0 V V in out CC T Operating Temperature, All Package Types 55 +125 C A t , t Input Rise and Fall Time V = 2.0 V 0 1000 ns r f CC (Figure 1) V = 4.5 V 0 500 CC V = 6.0 V 0 400 CC DESIGN GUIDE Criteria Value Unit Internal Gate Count* 7.0 ea Internal Gate Propagation Delay 1.5 ns Internal Gate Power Dissipation 5.0 W Speed Power Product 0.0075 pJ *Equivalent to a twoinput NAND gate

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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