Product Information

FDG6321C

FDG6321C electronic component of ON Semiconductor

Datasheet
MOSFET SC70-6 COMP N-P-CH

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

3000: USD 0.1946 ea
Line Total: USD 583.8

23280 - Global Stock
Ships to you between
Fri. 17 May to Thu. 23 May
MOQ: 3000  Multiples: 3000
Pack Size: 3000
Availability Price Quantity
660 - WHS 1


Ships to you between
Fri. 24 May to Wed. 29 May

MOQ : 1
Multiples : 1

Stock Image

FDG6321C
ON Semiconductor

1 : USD 0.5096
10 : USD 0.3969
30 : USD 0.3466
100 : USD 0.2861
500 : USD 0.2599
1000 : USD 0.2418

2707 - WHS 2


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 3
Multiples : 1

Stock Image

FDG6321C
ON Semiconductor

3 : USD 0.5551
25 : USD 0.3497
61 : USD 0.2691
166 : USD 0.2548

23280 - WHS 3


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 3000
Multiples : 3000

Stock Image

FDG6321C
ON Semiconductor

3000 : USD 0.1946

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Id - Continuous Drain Current
Vds - Drain-Source Breakdown Voltage
Rds On - Drain-Source Resistance
Transistor Polarity
Minimum Operating Temperature
Maximum Operating Temperature
Pd - Power Dissipation
Mounting Style
Package / Case
Packaging
Technology
Number of Channels
Vgs - Gate-Source Voltage
Channel Mode
Configuration
Series
Brand
Continuous Drain Current
Drain-Source Breakdown Voltage
Forward Transconductance - Min
Gate-Source Breakdown Voltage
Power Dissipation
Rds On
Fall Time
Rise Time
Factory Pack Quantity :
Typical Turn-Off Delay Time
Height
Length
Product
Transistor Type
Type
Width
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
Taric
Typical Turn-On Delay Time
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Digital FET, Dual N & P Channel FDG6321C General Description These dual N & PChannel logic level enhancement mode field www.onsemi.com effect transistors are produced using ON Semiconductors proprietary, high cell density, DMOS technology. This very high density process is S2 especially tailored to minimize onstate resistance. This device has G2 D1 been designed especially on low voltage replacement for bipolar digital transistors and small signal MOSFETS. Since bias resistors are D2 G1 not required, this dual digital FET can replace several different digital S1 transistors, with different bias resistor values. SC88/SC706/SOT363 CASE 419B02 Features NCh 0.50 A, 25 V MARKING DIAGRAM R = 0.45 V = 4.5 V DS(ON) GS R = 0.60 V = 2.7 V DS(ON) GS 21M PCh 0.41 A, 25 V R = 1.1 V = 4.5 V DS(ON) GS R = 1.5 V = 2.7 V DS(ON) GS 21 = Specific Device Code Very Small Package Outline SC706 M = Assembly Operation Month Very Low Level Gate Drive Requirements Allowing Direct Operation in 3 V Circuits (V < 1.5 V) GS(th) PIN CONNECTIONS GateSource Zener for ESD Ruggedness (>6 kV Human Body Model) 1 6 These Devices are PbFree and are RoHS Compliant ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A 2 5 Symbol Parameter NChannel PChannel Units V DrainSource Voltage 25 25 V DSS 3 4 V GateSource Voltage 8 8 V GSS I Drain Current Continuous 0.5 0.41 A D Pulsed 1.5 1.2 ORDERING INFORMATION P Maximum Power Dissipation 0.3 W D See detailed ordering and shipping information on page 8 of (Note 1) this data sheet. T , T Operating and Storage 55 to 150 C J STG Temperature Range ESD Electrostatic Discharge 6 kV Rating MILSTD883D Human Body Model (100 pF / 1500 ) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Semiconductor Components Industries, LLC, 1998 1 Publication Order Number: June, 2020 Rev. 5 FDG6321C/DFDG6321C THERMAL CHARACTERISTICS Symbol Parameter Ratings Unit R Thermal Resistance, JunctiontoAmbient (Note 1) 415 C/W JA 1. R is the sum of the junctiontocase and casetoambient thermal resistance where the case thermal reference is defined as the solder JA mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board design. R = 415C/W on JC CA JA minimum pad mounting on FR 4 board in still air. ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise noted) A Symbol Parameter Conditions Type Min Typ Max Unit OFF CHARACTERISTICS BV DrainSource Breakdown Voltage V V =0V, I = 250 A NCh 25 DSS GS D V =0V, I = 250 A PCh 25 GS D BV / T Breakdown Voltage Temperature I = 250 A, Referenced to 25 C NCh 26 mV/ C DSS J D Coefficient I = 250 A, Referenced to 25 C PCh 22 D I Zero Gate Voltage Drain Current V =20V, V =0V NCh 1 A DSS DS GS V =20V, V =0V, T = 55 C 10 DS GS J I GateBody Leakage Current V = 20 V, V =0V PCh 1 A GSS DS GS V = 20 V, V =0V, T = 55 C 10 DS GS J I GateBody Leakage Current V =8V, V =0V NCh 100 nA GSS GS DS V = 8V, V =0V PCh 100 GS DS ON CHARACTERISTICS (Note 2) V Gate Threshold Voltage NCh 0.65 0.8 1.5 V V =V , I = 250 A GS(th) DS GS D V =V , I = 250 A PCh 0.65 0.82 1.5 DS GS D V / T Gate Threshold Voltage I = 250 A, Referenced to 25 C NCh 2.6 mV/ C GS(th) J D Temperature Coefficient I = 250 A, Referenced to 25 C PCh 2.1 D R Static DrainSource V = 4.5 V, I = 0.5 A NCh 0.34 0.45 DS(ON) GS D OnResistance V = 4.5 V, I = 0.5 A, T = 125 C 0.55 0.72 GS D J V = 2.7 V, I = 0.2 A 0.44 0.6 GS D V = 4.5 V, I = 0.41 A PCh 0.85 1.1 GS D V = 4.5 V, I = 0.41 A, 1.2 1.8 GS D T = 125 C J V = 2.7 V, I = 0.05 A 1.15 1.5 GS D I OnState Drain Current V = 4.5 V, V =5V NCh 0.5 A D(ON) GS DS V = 4.5 V, V = 5V PCh 0.41 GS DS g Forward Transconductance V =5V, I = 0.5 A NCh 1.45 S FS DS D V = 5V, I = 0.41 A PCh 0.9 DS D DYNAMIC CHARACTERISTICS C Input Capacitance NChannel NCh 50 pF iss V =10V, V = 0 V, f = 1.0 MHz DS GS PCh 62 PChannel C Output Capacitance NCh 28 oss V = 10 V, V =0V, DS GS f = 1.0 MHz PCh 34 C Reverse Transfer Capacitance NCh 9 rss PCh 10 www.onsemi.com 2

Tariff Desc

8541.21.00 16 No - - With a dissipation rate of less than 1 W Free

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