MCIMX6Y0CVM05AB

Document Number: IMX6ULLIEC NXP Semiconductors Rev. 1.2, 11/2017 Data Sheet: Technical Data MCIMX6Y0CVM05AA MCIMX6Y0CVM05AB MCIMX6Y1CVM05AA MCIMX6Y1CVM05AB MCIMX6Y1CVK05AA MCIMX6Y1CVK05AB MCIMX6Y2CVM05AA MCIMX6Y2CVM05AB MCIMX6Y2CVM08AA MCIMX6Y2CVM08AB MCIMX6Y2CVK08AB i.MX 6ULL Applications Processors for Industrial Package Information Products Plastic Package MAPBGA 14 x 14 mm, 0.8 mm pitch MAPBGA 9 x 9 mm, 0.5 mm pitch Ordering Information See Table 1 on page 3 1. i.MX 6ULL Introduction 1 1 i.MX 6ULL Introduction 1.1. Ordering Information . 3 1.2. Features . 6 The i.MX 6ULL processors represent NXPs latest 2. Architectural Overview 10 2.1. Block Diagram . 10 achievement in integrated multimedia-focused products 3. Modules List 11 offering high performance processing with a high degree 3.1. Special Signal Considerations . 18 3.2. Recommended Connections for Unused Analog of functional integration, targeted towards the growing Interfaces . 19 market of connected devices. 4. Electrical Characteristics 21 4.1. Chip-Level Conditions . 21 The i.MX 6ULL is a high performance, ultra efficient 4.2. Power Supplies Requirements and Restrictions . 31 processor family with featuring NXPs advanced 4.3. Integrated LDO Voltage Regulator Parameters 32 4.4. PLLs Electrical Characteristics . 34 implementation of the single Arm Cortex -A7 core, 4.5. On-Chip Oscillators . 36 which operates at speeds of up to 792 MHz. i.MX 6ULL 4.6. I/O DC Parameters 37 4.7. I/O AC Parameters 40 includes integrated power management module that 4.8. Output Buffer Impedance Parameters . 43 reduces the complexity of external power supply and 4.9. System Modules Timing 46 simplifies the power sequencing. Each processor in this 4.10. Multi-Mode DDR Controller (MMDC) 57 4.11. General-Purpose Media Interface (GPMI) Timing 58 family provides various memory interfaces, including 4.12. External Peripheral Interface Parameters . 66 LPDDR2, DDR3, DDR3L, Raw and Managed NAND 4.13. A/D converter 98 5. Boot Mode Configuration . 103 flash, NOR flash, eMMC, Quad SPI, and a wide range of 5.1. Boot Mode Configuration Pins 103 other interfaces for connecting peripherals, such as 5.2. Boot Device Interface Allocation . 104 WLAN, Bluetooth, GPS, displays, and camera 6. Package Information and Contact Assignments . 111 6.1. 14 x 14 mm Package Information 111 sensors. 6.2. 9 x 9 mm Package Information 124 7. Revision History 138 2016-2017 NXP B.V.i.MX 6ULL Introduction The i.MX 6ULL processors are specifically useful for applications such as: Telematics Audio playback Connected devices IoT Gateway Access control panels Human Machine Interfaces (HMI) Portable medical and health care IP phones Smart appliances eReaders The features of the i.MX 6ULL processors include: Single-core Arm Cortex-A7The single core A7 provides a cost-effective and power-efficient solution. Multilevel memory systemThe multilevel memory system of processor is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processor supports many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR Flash, NAND Flash (MLC and SLC), OneNAND, Quad SPI, and managed NAND, including eMMC up to rev 4.4/4.41/4.5. Smart speed technologyPower management implemented throughout the IC that enables multimedia features and peripherals to consume minimum power in both active and various low power modes. Dynamic voltage and frequency scalingThe power efficiency of devices by scaling the voltage and frequency to optimize performance. Multimedia powerhouseThe multimedia performance of processor is enhanced by a multilevel cache system, NEON MPE (Media Processor Engine) co-processor, a programmable smart DMA (SDMA) controller, an asynchronous audio sample rate converter, an Electrophoretic Display (EPD) controller, and a Pixel processing pipeline (PXP) to support 2D image processing, including color-space conversion, scaling, alpha-blending, and rotation. 2x Ethernet interfaces2x 10/100 Mbps Ethernet controllers. Human-machine interfaceEach processor supports one digital parallel display interface. Interface flexibilityEach processor supports connections to a variety of interfaces: two high-speed USB on-the-go with PHY, multiple expansion card ports (high-speed MMC/SDIO host and other), two 12-bit ADC modules with up to 10 total input channels and two CAN ports. Advanced securityThe processors deliver hardware-enabled security features that enable secure e-commerce, digital rights management (DRM), information encryption, secure boot, AES-128 encryption, SHA-1, SHA-256 HW acceleration engine, and secure software downloads. The security features are discussed in the i.MX 6ULL Security Reference Manual (IMX6ULLSRM). i.MX 6ULL Applications Processors for Industrial Products, Rev. 1.2, 11/2017 2 NXP Semiconductors