74LVC374ABQ-Q100X

74LVC374A-Q100 Octal D-type flip-flop 5 V tolerant inputs/outputs positive-edge trigger 3-state Rev. 2 24 August 2020 Product data sheet 1. General description The 74LVC374A-Q100 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.2 V to 3.6 V Overvoltage tolerant inputs to 5.5 V CMOS low power dissipation Direct interface with TTL levels I circuitry provides partial Power-down mode operation OFF 8-bit positive edge-triggered register Independent register and 3-state buffer operation Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder jointsNexperia 74LVC374A-Q100 Octal D-type flip-flop 5 V tolerant inputs/outputs positive-edge trigger 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC374AD-Q100 -40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC374APW-Q100 -40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 74LVC374ABQ-Q100 -40 C to +125 C DHVQFN20 plastic dual in-line compatible SOT764-1 thermal enhanced very thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mm 4. Functional diagram 1 EN 11 C1 11 3 2 1D CP 3 2 D0 Q0 4 5 4 5 D1 Q1 7 6 7 6 D2 Q2 8 9 8 9 D3 Q3 13 12 13 12 D4 Q4 14 15 D5 Q5 14 15 17 16 D6 Q6 17 16 18 19 D7 Q7 18 19 OE 1 mna891 mna196 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 3 Q0 2 D0 Q1 4 D1 5 7 D2 Q2 6 8 FF1 Q3 9 D3 3-STATE to Q4 13 D4 OUTPUTS 12 FF8 Q5 14 D5 15 17 D6 Q6 16 18 Q7 19 D7 11 CP 1 OE mna892 Fig. 3. Functional diagram 74LVC374A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 24 August 2020 2 / 15