Product Information

74LVC1G74GD,125

74LVC1G74GD,125 electronic component of Nexperia

Datasheet
NXP Semiconductors Flip Flops Flip Flop D-Type Pos-Edge 1-Element
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1
1 : USD 0.6056
10 : USD 0.4544
25 : USD 0.4174
100 : USD 0.3764
250 : USD 0.3559
500 : USD 0.3445
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1
1 : USD 0.2574
5 : USD 0.2516
50 : USD 0.2398
250 : USD 0.2071
1000 : USD 0.1872
2500 : USD 0.1814
N/A

Obsolete
0 - WHS 3

MOQ : 1
Multiples : 1
1 : USD 0.4169
10 : USD 0.3416
100 : USD 0.209
1000 : USD 0.1843
3000 : USD 0.1753
9000 : USD 0.1753
24000 : USD 0.173
45000 : USD 0.1685
99000 : USD 0.1629
N/A

Obsolete

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Propagation Delay Time
High Level Output Current
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Packaging
Brand
Number Of Input Lines
Number Of Output Lines
Factory Pack Quantity :
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Additional Infomation About Product

74LVC1G74 Single D-type flip-flop with set and reset positive edge trigger Rev. 15 20 September 2021 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity 24 mA output drive (V = 3.0 V) CC CMOS low power consumption Direct interface with TTL levels I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 250 mA Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74LVC1G74 Single D-type flip-flop with set and reset positive edge trigger 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G74DP -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74LVC1G74DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package SOT765-1 8 leads body width 2.3 mm 74LVC1G74GT -40 C to +125 C XSON8 plastic extremely thin small outline package SOT833-1 no leads 8 terminals body 1 1.95 0.5 mm 74LVC1G74GF -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVC1G74GN -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVC1G74GS -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4. Marking Table 2. Marking codes Type number Marking code 1 74LVC1G74DP V74 74LVC1G74DC V74 74LVC1G74GT V74 74LVC1G74GF Y4 74LVC1G74GN Y4 74LVC1G74GS Y4 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram SD SD Q D D Q CP S CP FF C1 Q Q 1D RD R RD 001aah757 001aah758 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 74LVC1G74 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 15 20 September 2021 2 / 19

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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