Product Information

74HC11D

74HC11D electronic component of Nexperia

Datasheet
Logic Gates TRIPLE 3-IN AND GATE

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

5: USD 0.5426 ea
Line Total: USD 2.71

0 - Global Stock
MOQ: 5  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 15 May to Tue. 21 May

MOQ : 5
Multiples : 1

Stock Image

74HC11D
Nexperia

5 : USD 0.5673
50 : USD 0.4488
100 : USD 0.3505
500 : USD 0.3063
1000 : USD 0.2613

     
Manufacturer
Product Category
Package / Case
Brand
Logic Family / Base Number
Logic Type
Output Current
No. Of Inputs
Supply Voltage Min
Supply Voltage Max
Logic Case Style
No. Of Pins
Logic Ic Family
Logic Ic Base Number
Operating Temperature Min
Operating Temperature Max
Rohs Phthalates Compliant
Msl
Svhc
Base Number
Ic Generic Number
Logic Function Number
Logic Ic Function
Operating Temperature Range
Supply Voltage
Supply Voltage Range
Termination Type
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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT11 Triple 3-input AND gate December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Triple 3-input AND gate 74HC/HCT11 FEATURES Output capability: standard I category: SSI CC GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. QUICK REFERENCE DATA GND = 0 V T = 25 C t = t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay nA, nB, nC to nY C = 15 pF V = 5 V 10 11 ns PHL PLH L CC C input capacitance 3.5 3.5 pF I C power dissipation capacitance per gate notes 1 and 2 18 20 pF PD Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P = C V f + (C V f ) where: D PD CC i L CC o f = input frequency in MHz i f = output frequency in MHz o C = output load capacitance in pF L V = supply voltage in V CC 2 (C V f ) = sum of outputs L CC o 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V I CC ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. December 1990 2

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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