Product Information

74AUP1G09GX,125

74AUP1G09GX,125 electronic component of Nexperia

Datasheet
Logic Gates 74AUP1G09GX/SOT1226/X2SON5

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.4753 ea
Line Total: USD 0.48

9506 - Global Stock
Ships to you between
Thu. 09 May to Mon. 13 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
5799 - Global Stock


Ships to you between Thu. 09 May to Mon. 13 May

MOQ : 1
Multiples : 1
1 : USD 0.4697
10 : USD 0.3514
100 : USD 0.2197
1000 : USD 0.1195
2500 : USD 0.1135
10000 : USD 0.099

     
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74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 7 14 January 2022 Product data sheet 1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. This device CC is fully specified for partial power down applications using I . The I circuitry disables the OFF OFF output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AUP1G09 Low-power 2-input AND gate with open-drain 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G09GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1G09GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74AUP1G09GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G09GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G09GX -40 C to +125 C X2SON5 plastic thermal enhanced extremely thin SOT1226-3 small outline package no leads 5 terminals body 0.8 0.8 0.32 mm 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G09GW p9 74AUP1G09GM p9 74AUP1G09GN p9 74AUP1G09GS p9 74AUP1G09GX p9 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Y A 1 B 4 Y 1 & 2 4 A 2 GND B 001aad598 001aad599 001aad600 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74AUP1G09 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 7 14 January 2022 2 / 17

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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