Product Information

MT41K256M16TW-107 AUT:P

MT41K256M16TW-107 AUT:P electronic component of Micron

Datasheet
DRAM Chip DDR3L SDRAM 4Gbit 256M X 16 96-Ball FBGA

Manufacturer: Micron
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 9.798 ea
Line Total: USD 9.8

5561 - Global Stock
Ships to you between
Thu. 23 May to Mon. 27 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1187 - WHS 1


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 1224
Multiples : 1224
1224 : USD 8.8977
1300 : USD 8.7724
2500 : USD 8.5218
6200 : USD 8.3338
13000 : USD 8.0205
62000 : USD 7.8952
130000 : USD 7.7699

5561 - WHS 2


Ships to you between Thu. 23 May to Mon. 27 May

MOQ : 1
Multiples : 1
1 : USD 9.798
10 : USD 9.1195
25 : USD 8.211
100 : USD 7.9695
250 : USD 7.705
1000 : USD 7.4175
2448 : USD 7.406

     
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4Gb: x8, x16 Automotive DDR3L SDRAM Description Automotive DDR3L SDRAM MT41K512M8 64 Meg x 8 x 8 banks MT41K256M16 32 Meg x 16 x 8 banks Options Marking Description Configuration DDR3L SDRAM (1.35V) is a low voltage version of the 512 Meg x 8 512M8 DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM 256 Meg x 16 256M16 (Die Rev :E) data sheet specifications when running in FBGA package (Pb-free) x8 1.5V compatible mode. 78-ball (8mm x 10.5mm) DA FBGA package (Pb-free) x16 Features 96-ball (8mm x 14mm) TW V = V = 1.35V (1.2831.45V) DD DDQ Timing cycle time Backward compatible to V = V = 1.5V 0.075V DD DDQ 1.07ns CL = 13 (DDR3-1866) -107 Supports DDR3L devices to be backward com- Product certification patible in 1.5V applications Automotive A Differential bidirectional data strobe Operating temperature 8n-bit prefetch architecture Industrial (40C T +95C) IT C Differential clock inputs (CK, CK ) Automotive (40C T +105C) AT C 8 internal banks 3 Ultra-high (40C T +125C) UT C Nominal and dynamic on-die termination (ODT) Revision :P for data, strobe, and mask signals Programmable CAS (READ) latency (CL) Note: Programmable posted CAS additive latency (AL) Programmable CAS (WRITE) latency (CWL) 1. Not all options listed can be combined to de- Fixed burst length (BL) of 8 and burst chop (BC) of 4 fine an offered product. Use the part catalog (via the mode register set MRS ) search on 4Gb: x8, x16 Automotive DDR3L SDRAM Description Table 2: Addressing Parameter 512 Meg x 8 256 Meg x 16 Configuration 64 Meg x 8 x 8 banks 32 Meg x 16 x 8 banks Refresh count 8K 8K Row address 64K (A 15:0 ) 32K (A 14:0 ) Bank address 8 (BA 2:0 ) 8 (BA 2:0 ) Column address 1K (A 9:0 ) 1K (A 9:0 ) Page size 1KB 2KB Figure 1: DDR3L Part Numbers Example Part Number: MT41K512M8DA-107AAT:P - : MT41K Configuration Package Speed Revision :P Revision Configuration Mark 512 Meg x 8 512M8 256 Meg x 16 256M16 Temperature Mark Industrial temperature IT Package Mark Automotive temperature AT 78-ball FBGA, 8mm x 10.5mm DA Ultra-high temperature UT 96-ball FBGA, 8mm x 14mm TW Speed Grade Mark Certification Mark t CK = 1.07ns, CL = 13 107 Automotive A Note: 1. Not all options listed can be combined to define an offered product. Use the part catalog search on

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:
EL9
Elpida Memory
ELPIDA MEMORY INC
IE6
MI9
MICRON SEMICONDUCTOR
Micron Tech
MICRON TECHNOLOGY
Micron Technology Inc
Micron Technology Inc.
NU9
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC. (VA)

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