MCP47CXBXX 8/10/12-Bit Digital-to-Analog Converters, 1 LSb INL 2 Single/Dual Voltage Outputs with I C Interface Features Package Types Memory Options: MCP47CXBX1 (Single) - Volatile Memory: MCP47CVBXX MSOP-10, DFN-10 (3x3) - Nonvolatile Memory: MCP47CMBXX V DD 1 10 SDA Operating Voltage Range: A0 2 9 SCL - 2.7V to 5.5V Full specifications V A1 REF 3 8 - 1.8V to 2.7V Reduced device specifications V Output Voltage Resolutions: OUT 4 7 V SS - 8-bit: MCP47CXB0X (256 steps) NC 5 6 LAT/HVC - 10-bit: MCP47CXB1X (1024 steps) QFN-16 (3x3) - 12-bit: MCP47CXB2X (4096 steps) Nonvolatile Memory (MTP) Size: 32 Locations 1 LSb Integral Nonlinearity (INL) Specification DAC Voltage Reference Source Options: A0 1 12 SCL - Device V DD V 2 11 A1 REF (1) -External V pin (buffered or unbuffered) 17 EP REF V 3 10 V OUT SS - Internal band gap (1.214V typical) NC 4 9 LAT/HVC Output Gain Options: -1x (Unity) - 2x (available when not using internal V as DD voltage source) MCP47CXBX2 (Dual) Power-on/Brown-out Reset (POR/BOR) MSOP-10, DFN-10 (3x3) Protection V Power-Down Modes: DD 1 10 SDA A0 - Disconnects output buffer (high-impedance) 2 9 SCL - Selection of V pull-down resistors V REF A1 OUT 3 8 (100 k or 1 k) V OUT0 4 7 V 2 SS I C Interface: (2) V 5 6 LAT/HVC OUT1 - Slave address options: register-defined address with two physical address select pins QFN-16 (3x3) (package dependent) - Standard (100 kbps), Fast (400 kbps) and High-Speed (up to 3.4 Mbps) modes Package Types: A0 1 12 SCL - Dual: 16-lead 3 x 3 QFN, 10-lead MSOP, V 2 11 A1 REF0 (1) 10-lead 3 x 3 DFN 17 EP V 3 10 OUT0 V SS - Single: 16-lead 3 x 3 QFN, 10-lead MSOP, V 4 9 REF1 LAT0/HVC 10-lead 3 x 3 DFN Extended Temperature Range: -40C to +125C Note 1: Exposed pad (substrate paddle). 2: This pins signal can be connected to DAC0 and/or DAC1. 2018-2019 Microchip Technology Inc. DS20006089B-page 1 V V V 5 16 NC 5 16 DD DD OUT1 6 15 NC NC NC 6 15 NC NC 7 14 NC NC 7 14 NC SDA LAT1 8 13 NC 8 13 SDAMCP47CXBXX When the V pin is used with an external voltage General Description REF reference, the user can select between a gain of 1 or 2 The MCP47CXBXX devices are single and dual and can have the reference buffer enabled or disabled. channel 8-bit, 10-bit and 12-bit buffered voltage output When the gain is 2, the V pin voltage should be REF Digital-to-Analog Converters (DAC) with volatile or limited to a maximum of V /2. DD 2 MTP memory, and an I C serial interface. 2 These devices have a two-wire I C compatible serial The MTP memory can be written by the user up to interface for Standard (100 kHz), Fast (400 kHz) or 32 times for each specific register. It requires a high- High-Speed (1.7 MHz and 3.4 MHz) modes. voltage level on the HVC pin, typically 7.5V, in order to successfully program the desired memory location. Applications The nonvolatile memory includes power-up output values, device Configuration registers and general Set Point or Offset Trimming purpose memory. Sensor Calibration pin, the device V or the internal band gap The V Low-Power Portable Instrumentation REF DD voltage can be selected as the DACs reference PC Peripherals voltage. When V is selected, V is internally DD DD Data Acquisition Systems connected to the DAC reference circuit. MCP47CMBX1 Block Diagram (Single-Channel Output) V DD Memory Power-up/Brown-out Control V SS VOLATILE (4x16) DAC0 2 SDA I C Serial Interface Module V REF and Control Logic SCL POWER-DOWN (WiperLock Technology) GAIN STATUS A0 ADDR6:ADDR0 A1 NONVOLATILE (13x16) DAC0 V IHH LAT/HVC V REF POWER-DOWN LAT0 2 GAIN/I C ADDRESS WiperLock V DD PD1:PD0 and VREF1:VREF0 V Band Gap BG GAIN 1.214V VREF1:VREF0 OP AMP V OUT0 V REF0 V DD PD1:PD0 VREF1:VREF0 DS20006089B-page 2 2018-2019 Microchip Technology Inc. Resistor Ladder 1k 100 k