KSZ9567RTXI-TR

KSZ9567R 7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces Five Integrated PHY Ports Highlights - 1000BASE-T/100BASE-TX/10BASE-Te IEEE 802.3 Non-blocking wire-speed Ethernet switching fabric - Fast Link-up option significantly reduces link-up time Full-featured forwarding and filtering control, includ- - Auto-negotiation and Auto-MDI/MDI-X support ing Access Control List (ACL) filtering - On-chip termination resistors and internal biasing for Full VLAN and QoS support differential pairs to reduce power - LinkMD cable diagnostic capabilities for determining Five ports with integrated 10/100/1000BASE-T PHY cable opens, shorts, and length transceivers Advanced Switch Capabilities Two ports with 10/100/1000 Ethernet MACs and con- - IEEE 802.1Q VLAN support for 128 active VLAN figurable RGMII/MII/RMII interfaces groups and the full range of 4096 VLAN IDs IEEE 1588v2 Precision Time Protocol (PTP) support - IEEE 802.1p/Q tag insertion/removal on per port basis IEEE 802.1AS/Qav Audio Video Bridging (AVB) - VLAN ID on per port or VLAN basis IEEE 802.1X access control support - IEEE 802.3x full-duplex flow control and half-duplex EtherGreen power management features, back pressure collision control including low power standby - IEEE 802.1X access control 2 Flexible management interface options: SPI, I C, (Port-based and MAC address based) MIIM, and in-band management via any port - IGMP v1/v2/v3 snooping for multicast packet filtering Industrial temperature range support - IPv6 multicast listener discovery (MLD) snooping - IPv4/IPv6 QoS support, QoS/CoS packet prioritization 128-pin TQFP-EP (14 x 14mm) RoHS compliant pkg - 802.1p QoS packet classification with 4 priority queues - Programmable rate limiting at ingress/egress ports Target Applications IEEE 1588v2 PTP and Clock Synchronization Industrial Ethernet (Profinet, MODBUS, Ethernet/IP) - Transparent Clock (TC) with auto correction update - Master and slave Ordinary Clock (OC) support Real-time Ethernet networks - End-to-end (E2E) or peer-to-peer (P2P) IEC 61850 networks w/ power substation automation - PTP multicast and unicast message support Industrial control/automation switches - PTP message transport over IPv4/v6 and IEEE 802.3 Networked measurement and control systems - IEEE 1588v2 PTP packet filtering Test and measurement equipment - Synchronous Ethernet support via recovered clock Audio Video Bridging (AVB) Features - Compliant with IEEE 802.1BA/AS/Qat/Qav standards - Priority queuing, Low latency cut-through mode Switch Management Capabilities - gPTP time synchronization, credit-based traffic shaper - 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, - Time aware traffic scheduler per port queue management, MIB counters Comprehensive Configuration Registers Access - Non-blocking store-and-forward switch fabric assures 2 - High-speed 4-wire SPI (up to 50MHz), I C interfaces fast packet delivery by utilizing 4096 entry forwarding provide access to all internal registers table with 256kByte frame buffer - MII Management (MIIM, MDC/MDIO 2-wire) Interface - Jumbo packet support up to 9000 bytes provides access to all PHY registers - Port mirroring/monitoring/sniffing: - In-band management via any of the data ports ingress and/or egress traffic to any port - I/O pin strapping facility to set certain register bits from - Rapid spanning tree protocol (RSTP) support for topol- I/O pins at reset time ogy management and ring/linear recovery Power Management - Multiple spanning tree protocol (MSTP) support - Energy detect power-down mode on cable disconnect Two Configurable External MAC Ports - Dynamic clock tree control - Reduced Gigabit Media Independent Interface - Unused ports can be individually powered down (RGMII) v2.0 - Full-chip software power-down - Reduced Media Independent Interface (RMII) v1.2 - Wake-on-LAN (WoL) standby power mode with PME with 50MHz reference clock input/output option interrupt output for system wake upon triggered events - Media Independent Interface (MII) in PHY/MAC mode 2017 Microchip Technology Inc. DS00002329B-page 1KSZ9567R TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Documentation To obtain the most up-to-date version of this documentation, please register at our Worldwide Web site at: