HV6810WG-G

HV6810 10-Channel Serial-Input Latched Display Driver Features General Description High Output Voltage 80V The HV6810 is a monolithic integrated circuit designed to drive a dot matrix or segmented VFD. These devices High-speed 5 MHz at 5 V DD feature a serial data output to cascade additional Low-power I 0.1 mA (All High) BB devices for large displays. Active Pull-down 100 A Minimum at 25C A 10-bit data word is serially loaded into the shift Output Source Current 25 mA at 60V V BB register on the positive-going transition of the clock. 10-channel Display Driver Parallel data are transferred to the output buffers High-speed Serially-shifted Data Input through a 10-bit D-type latch while the latch enable 5V CMOS-compatible Inputs input is high. The data are latched when the latch enable is low. When the blanking input is high, all of the Latches on all Driver Outputs outputs are low. Pin-compatible Replacement for UCN5810A, TL4810A and TL4810B Outputs are structures formed by double-diffused MOS (DMOS) transistors with output voltage ratings of 80V and 25 mA source-current capability. All inputs are Applications compatible with CMOS levels. High-speed Dot Matrix Print Head Driver Vacuum Fluorescent Display (VFD) Driver Package Type 20-lead SOW (Top view) 1 20 See Table 2-1 for pin information. 2016 Microchip Technology Inc. DS20005626A-page 1HV6810 Functional Block Diagram V BB Blanking Latch Enable Shift Register Latches Data Input 1D C2 LC1 Q1 Clock C1 2D 1D C2 LC2 Q2 C1 2D 6 Stages (Q3 thru Q8 not shown C2 1D LC9 Q9 2D C1 1D C2 LC10 Q10 C1 2D Serial Out DS20005626A-page 2 2016 Microchip Technology Inc.