IS62WV51216BLL-55BLI

IS62WV51216ALL IS62WV51216BLL 512K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM DECEMBER 2007 FEATURES DESCRIPTION The ISSI IS62WV51216ALL/ IS62WV51216BLL are high- High-speed access time: 45ns, 55ns speed, 8M bit static RAMs organized as 512K words by 16 CMOS low power operation bits. It is fabricated using ISSI s high-performance CMOS technology. This highly reliable process coupled with innovative 36 mW (typical) operating circuit design techniques, yields high-performance and low 12 W (typical) CMOS standby power consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1 is LOW, CS2 is HIGH and both LB Single power supply and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS 1.65V--2.2V VDD (62WV51216ALL) input levels. 2.5V--3.6V VDD (62WV51216BLL) Easy memory expansion is provided by using Chip Enable Fully static operation: no clock or refresh and Output Enable inputs. The active LOW Write Enable required (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. Three state outputs The IS62WV51216ALL and IS62WV51216BLL are packaged Data control for upper and lower bytes in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm) and 44-Pin TSOP (TYPE II). Industrial temperature available Lead-free available FUNCTIONAL BLOCK DIAGRAM 512K x 16 A0-A18 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CS2 CS1 OE CONTROL CIRCUIT WE UB LB Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. D 12/13/2007IS62WV51216ALL, IS62WV51216BLL PIN CONFIGURATIONS PIN DESCRIPTIONS 48-Pin mini BGA (7.2mm x 8.7mm) A0-A18 Address Inputs I/O0-I/O15 Data Inputs/Outputs 1 2 3 4 5 6 CS1, CS2 Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) A1 A LB OE A0 A2 CS2 A4 UB Upper-byte Control (I/O8-I/O15) I/O UB A3 CS1 I/O B 8 0 I/O I/O A5 A6 I/O I/O NC No Connection C 9 10 1 2 GND A7 I/O A17 I/O VDD VDD Power D 11 3 VDD I/O GND A16 I/O4 GND E 12 GND Ground I/O I/O A14 A15 I/O I/O F 14 13 5 6 I/O NC A12 WE 15 A13 I/O G 7 A18 A8 A9 A10 A11 NC H 44-Pin TSOP (Type II) A4 1 44 A5 A3 2 43 A6 A2 3 42 A7 A1 4 41 OE A0 5 40 UB CS1 6 39 LB I/O0 7 38 I/O15 I/O1 8 37 I/O14 I/O2 9 36 I/O13 I/O3 10 35 I/O12 VDD 11 34 GND GND 12 33 VDD I/O4 13 32 I/O11 I/O5 14 31 I/O10 I/O6 15 30 I/O9 I/O7 16 29 I/O8 WE 17 28 A18 A16 18 27 A8 A15 19 26 A9 A14 20 25 A10 A13 21 24 A11 A12 22 23 A17 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. D 12/13/2007