PRODUCT BRIEF CHL8225/CHL8228 DIGITAL MULTI-PHASE BUCK CONTROLLER parameters are easily defined using the CHiL Intuitive FEATURES Power Designer (IPD) GUI and stored in on-chip NVM. 5-phase & 8-phase dual output PWM Controller with phases flexibly assigned between Loops 1 & 2 The CHL8225/8 provides extensive OVP, UVP, OCP and OTP fault protection and includes thermistor based Dynamic voltage control by 2-bit parallel interface with temperature sensing with VRHOT signal. Gamer Mode override and Vmax setting Input Voltage Management for up to 3 Input Voltages The CHL8225/8 includes numerous features like register diagnostics for fast design cycles and platform I Monitor and Phase Current Capture Mode CRITICAL differentiation, simplifying VRD design and enabling fastest Phase Switching frequency from 200kHz to 1.2MHz time-to-market with its set-and-forget methodology. CHiL Efficiency Shaping Features including Variable Gate Drive, Dynamic Phase Control Programmable 1-phase or 2-phase for Light Loads and 40 39 38 37 36 35 34 33 32 31 Active Diode Emulation for Very Light Loads RCSP 1 30 RCSP L2 CHiL Adaptive Transient Algorithm (ATA) minimizes 2 29 RCSM RCSM L2 output bulk capacitors and system cost VCC 3 28 VCC Designed for use with coupled inductors 4 27 VSEN L2 VSEN VRTN 5 CHL8225 26 VRTN L2 Per-Loop Fault Protection: OVP, UVP, OCP, OTP 40 Pin 6x6 QFN Top View 6 25 PWM5 RRES I2C/SMBus/PMBus system interface for telemetry of 7 24 PWM4 TSEN Temperature, Voltage, Current & Power for both loops V18A 8 23 PWM3 Non-Volatile Memory (NVM) for custom configuration 9 22 PWM2 VR READY 41 GND Compatible with CHiL ATL and 3.3V tri-state Drivers PWM1 VR READY L2 10 21 +3.3V supply voltage 0C to 85C ambient operation 11 12 13 14 15 16 17 18 19 20 Pb-Free, RoHS, 6x6 40pin & 8x8 56pin QFN packages DESCRIPTION The CHL8225/8 are dual-loop digital multi-phase buck 56 55 54 53 52 51 50 49 48 47 46 45 44 43 controllers. The CHL8225 drives up to 5 phases and the CHL8228 drives up to 8 phases. They feature Input Voltage ISEN8 1 42 ISEN7 Management allowing up to 3 input voltages to be 2 41 RCSP RCSP L2 monitored to ensure adequate power is delivered to the 3 40 RCSM RCSM L2 load. Dynamic voltage control is provided by 4 registers VCC 4 39 VCC which are programmed through I2C/SMBus/PMBus and then selected using a 2-bit parallel bus for fast access. 5 38 VRHOT2 VSEN L2 6 37 VSEN VRTN L2 The CHL8225/8 NVM saves pins and enables a small VRTN 7 36 PWM8 CHL8228 package size. 56 Pin 8x8 QFN Top View RRES 8 35 PWM7 The CHL8225/8 includes the CHiL Efficiency Shaping 9 34 TSEN PWM6 Technology to deliver exceptional efficiency at minimum V18A 10 33 PWM5 cost across the entire load range. CHiL Variable Gate Drive VR READY 11 32 PWM4 optimizes the MOSFET gate drive voltage as a function of 12 31 VR READY L2 PWM3 real-time load current. CHiL Dynamic Phase Control adds 13 30 and drops phases based upon load current. The EN L2 PWM2 57 GND CHL8225/8 can be configured to enter 1-phase operation VINSEN 14 29 PWM1 and active diode emulation mode based upon load current 15 16 17 18 19 20 21 22 23 24 25 26 27 28 or by command. CHiLs unique Adaptive Transient Algorithm (ATA), based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors. In addition, a coupled inductor Figure 1: CHL8225 & CHL8228 Packages mode, with phases added/dropped in pairs enables further improvement in transient response and form factor. APPLICATIONS The I2C/PMBus interface can communicate with up to 16 Multiphase GPU systems CHL8225/8 based VR loops. Device configuration and fault Trademarks and registered trademarks are the property of the respective One Highwood Dr ive, Tewksbury, MA 01876 owners. Tel: +1(978) 640-0011 - 1 - PB0008, Rev 1.0, June 11, 2010 www.chilsemi.com 2010 CHiL Semiconductor Corp. All rights reserved VINSEN AUX1 IRTN8 VINSEN AUX2 IRTN1 VINSEN IRTN1 VIDSEL0 L2 ISEN1 VINSEN AUX1 ISEN1 VIDSEL1 IRTN2 VIDSEL L2 IRTN2 VIDSEL0 ISEN2 VIDSEL1 ISEN2 VRHOT ICRIT IRTN3 VIDSEL0 IRTN3 ENABLE ISEN3 VRHOT ICRIT ISEN3 VIDSEL1 L2 IRTN4 ENABLE IRTN4 SMB DIO ISEN4 ISEN4 SMB DIO SMB CLK IRTN5 SMB CLK IRTN5 ISEN5 VBOOT ISEN5 VAR GATE VMAX IRTN6 TSEN2 ISEN6 VAR GATE IRTN7CHL8225/CHL8228 DIGITAL MULTI-PHASE BUCK CONTROLLER TYPICAL APPLICATIONS BLOCK DIAGRAM 12V CHL8510 Boot Vcc HiGate V GPU L1 Rseries RCSP V VGD HVCC Switch LVCC CCS L R Th RCS PWM LoGate O GND Mode A R PWM1 series D RCSM ISEN1 +3.3V IRTN1 VCC 12V CHL8510 Boot HiGate Vcc HVCC V VGD Switch LVCC VSEN PWM LoGate VRTN GND Mode PWM 2 RRES ISEN2 IRTN2 TSEN 12V RTh2 CHL8510 CHL8225/8 Boot Vcc HiGate HVCC Switch V VGD TSEN2 LVCC PWM RTh2 LoGate V18A GND Mode PWM3 ISEN3 VR RDY L1 IRTN3 +12V Main VR RDY L2 12V RVIN 1 Boot CHL8510 VINSEN Vcc HiGate +12V Aux 1 R HVCC Switch VIN 2 V VGD LVCC PWM R LoGate VIN 1 GND Mode VINSEN AUX 1 PWM4 RVIN 2 +12V Aux 2 ISEN4 IRTN4 RVIN 1 1 VINSEN AUX 2 PWM5 RVIN 2 1 VIDSEL1 L2 ISEN5 1 VIDSEL0 L2 IRTN5 GPU I/O VIDSEL1 1 VIDSEL0 PWM6 1 Unused ISEN6 phases VR HOT ICRIT 1 IRTN6 VR HOT2 1 PWM7 EN 1 From ISEN7 1 System EN L2 1 IRTN7 SMB DIO I2C or SMB CLK SMBus 12V CHL8510 Boot Vcc HiGate V GPU L2 1 VMAX V VGD HVCC Switch LVCC 1 VBOOT PWM LoGate L GND O 1 Mode PWM8 A 1 D ISEN8 RCSP L2 1 Rseries IRTN8 CCS R Th RCS R series RCSM L2 12V Boot CHL8510 Vcc HiGate HVCC Switch VSEN L2 LVCC VAR GATE PWM VRTN L2 LoGate V VGD Notes GND Mode 1 GND CHL8228 only Optional Variable Gate Drive Circuit ORDERING INFORMATION CHL822 - Package Tape & Reel Qty Part Number 1 QFN 3000 CHL8225-00CRT T: Tape & Reel 2 QFN 3000 CHL8225-xxCRT 1 QFN 3000 CHL8228-00CRT Package type 2 QFN 3000 CHL8228-xxCRT R : QFN Operating Temperature Notes C: Commercial 1 For unprogrammed/default parts, use configuration file 00. Unprogrammed parts will not start up until Standard programmed in order to insure a safe power up. Range xx: Configuration file 2 -xx indicates a customer specific configuration file. R : QFN Part 5: CHL8225 8: CHL8228 PB0008 Rev 1.0, June 11, 2010 - 2 - V V V V V V V V V V V V V V V V V V V