SLG47004V

SLG47004 GreenPAK Programmable Mixed-Signal Matrix Preliminary with In-System Programmability and Advanced Analog Features General Description The SLG47004 provides a small, low power component for commonly used analog signal processing and mixed-signal functions. Individual, tunable, analog components used in conjunction with configurable logic provide a way to solve a wide variety of tasks with minimal costs. The user creates their circuit design by programming the multiple time Non-Volatile Memory (NVM) to configure the interconnect logic, the analog and digital macrocell, and the IO Pins of the SLG47004. Key Features Two Programmable Bandwidth Op Amps 3-bit LUT 3-Op Amp Instrumentation Amplifier Function One Selectable DFF/LATCH or 4-bit LUT (including Additional Internal Op Amp) Seven Multi-Function Macrocells Rail to Rail Input Six Selectable DFF/LATCH or 3-bit LUTs + 8-bit Low Quiescent Current Delay/Counters Low Offset Voltage One Selectable DFF/LATCH or 4-bit LUT + 16-bit Analog Comparator Mode Delay/Counter Optional Vref Voltage Connection for Input Pins Serial Communications 2 Two 1024 Position Digital Rheostats I C Protocol Interface 2 User Defined Auto-Trim Option 2-kbit (256 x 8) I C-Compatible (2-Wire) Serial EEPROM Manual Control Option Emulation with Software Write Protection 2 I C Control Option Programmable Delay with Edge Detector Output Potentiometer Mode Deglitch Filter or Edge Detector Two Single-Pole/Single-Throw Analog Switches Three Oscillators Voltage or Current Source/Sink Mode 2.048 kHz Oscillator One Low Offset Chopper Comparator 2.048 MHz Oscillator Two Low Power General Purpose ACMPs 25 MHz Oscillator ACMP Sampling Mode Analog Temperature Sensor Hysteresis with Independently-Selectable Thresholds Power-On Reset Three Voltage References In-System Programmability Two ACMP Vref Output Buffers Multiple Time Programmable Memory One High Drive Buffer Wide Range Power Supply Thirteen Combination Function Macrocells 2.5 V (4 %) to 5 V (10 %) V DD Three Selectable DFF/LATCH or 2-bit LUTs Operating Temperature Range: -40 C to +85 C One Selectable Programmable Pattern Generator or RoHS Compliant/Halogen-Free 2-bit LUT Package Available Seven Selectable DFF/LATCH or 3-bit LUTs 24-pin STQFN: 3 mm x 3 mm x 0.55 mm, 0.4 mm pitch One Selectable Pipe Delay or Ripple Counter or Applications Adjust Precision Threshold Sensor Offset Trimming/Calibration Tunable Analog Filters Operational Amplifier Adjustable Gain and Offset Adjustable Voltage-to-Current Conversions Personal Computers and Servers PC Peripherals Consumer Electronics Data Communications Equipment Handheld and Portable Electronics Smartphones and Fitness Bands Notebook and Tablet PCs Datasheet Revision 2.1 13-Nov-2020 1 of 243 2020 Dialog Semiconductor CFR0011-120-00SLG47004 GreenPAK Programmable Mixed-Signal Matrix Preliminary with In-System Programmability and Advanced Analog Features Contents General Description .................................................................................................................................................................1 Key Features ............................................................................................................................................................................1 Applications..............................................................................................................................................................................1 1 Block Diagram ....................................................................................................................................................................10 2 Pinout ..................................................................................................................................................................................11 2.1 Pin Configuration - STQFN-24L ...........................................................................................................................11 3 Characteristics ...................................................................................................................................................................14 3.1 Absolute Maximum Ratings .................................................................................................................................14 3.2 Electrostatic Discharge Ratings ...........................................................................................................................14 3.3 Recommended Operating Conditions ..................................................................................................................14 3.4 Electrical Characteristics ......................................................................................................................................15 3.5 Timing Characteristics .........................................................................................................................................23 3.6 Oscillator Characteristics .....................................................................................................................................25 3.7 ACMP Characteristics ..........................................................................................................................................25 3.8 Internal Vref Characteristics .................................................................................................................................26 3.9 Output Buffers Characteristics .............................................................................................................................26 3.10 Analog Temperature Sensor Characteristics .....................................................................................................28 3.11 Programmable Operational Amplifier Characteristics ........................................................................................30 3.12 100K Digital Rheostat Characteristics ...............................................................................................................34 3.13 Analog Switches Characteristics .......................................................................................................................35 4 User Programmability ........................................................................................................................................................37 5 IO Pins .................................................................................................................................................................................38 5.1 GPIO Pins ............................................................................................................................................................38 5.2 GPI Pins ...............................................................................................................................................................38 5.3 Pull-Up/Down Resistors .......................................................................................................................................38 5.4 Fast Pull-Up/Down during Power-Up ...................................................................................................................38 5.5 I2C Mode IO Structure .........................................................................................................................................39 5.6 Matrix OE IO Structure .........................................................................................................................................40 5.7 GPI Structure .......................................................................................................................................................41 5.8 IO Pins Typical Performance ...............................................................................................................................42 6 Connection Matrix ..............................................................................................................................................................45 6.1 Matrix Input Table ................................................................................................................................................46 6.2 Matrix Output Table .............................................................................................................................................47 6.3 Connection Matrix Virtual Inputs ..........................................................................................................................50 6.4 Connection Matrix Virtual Outputs .......................................................................................................................51 7 Combination Function Macrocells ....................................................................................................................................52 7.1 2-Bit LUT or D Flip-Flop Macrocells .....................................................................................................................52 7.2 2-bit LUT or Programmable Pattern Generator ....................................................................................................55 7.3 3-Bit LUT or D Flip-Flop with Set/Reset Macrocells .............................................................................................57 7.4 4-Bit LUT or D Flip-Flop with Set/Reset Macrocell ...............................................................................................65 7.5 3-Bit LUT or Pipe Delay/Ripple Counter Macrocell ..............................................................................................67 8 Multi-Function Macrocells .................................................................................................................................................71 8.1 3-Bit LUT or DFF/Latch with 8-Bit Counter/Delay Macrocells ..............................................................................71 8.2 4-Bit LUT or DFF/Latch with 16-Bit Counter/Delay Macrocell ..............................................................................80 8.3 CNT/DLY/FSM Timing Diagrams .........................................................................................................................83 8.4 Wake and Sleep Controller ..................................................................................................................................92 9 Analog Comparators ..........................................................................................................................................................96 9.1 Analog Comparators Overview ............................................................................................................................96 9.2 Chopper Analog Comparator ...............................................................................................................................98 9.3 ACMP Sampling Mode .........................................................................................................................................99 9.4 ACMP Typical Performance ...............................................................................................................................100 10 Programmable Operational Amplifiers .........................................................................................................................101 10.1 General Description .........................................................................................................................................101 10.2 Modes of Operation ..........................................................................................................................................103 10.3 Op Amp Typical Performance ..........................................................................................................................107 Datasheet Revision 2.1 13-Nov-2020 2 of 243 2020 Dialog Semiconductor CFR0011-120-00