is a FPGA which is designed to reduce the overall system complexity and engineering costs. It is an advanced, small-to-medium sized FPGA with a dense structure of logic blocks and an 8 Kb block RAM. It has a total of 301,440 logic cells, and 256 Mbits of configurable SRAM which can be used to implement complex logic functions and algorithms. It operates at a maximum clock frequency of about 150MHz and has a total of 118 user I/Os. The FPGA also features fast, flexible, low-power logic, uniquely matched to achieve small target sizes, low system costs and power consumption.