XPW6R30ANB MOSFETs Silicon N-channel MOS (U-MOS-H) XPW6R30ANBXPW6R30ANBXPW6R30ANBXPW6R30ANB 1. 1. ApplicationsApplications 1. 1. ApplicationsApplications Automotive Motor Drivers Switching Voltage Regulators 2. 2. 2. 2. FeaturesFeaturesFeaturesFeatures (1) AEC-Q101 qualified (2) Small, thin package (3) Low drain-source on-resistance: R = 5.3 m (typ.) (V = 10 V) DS(ON) GS (4) Low leakage current: I = 10 A (max) (V = 100 V) DSS DS (5) Enhancement mode: V = 2.5 to 3.5 V (V = 10 V, I = 0.5 mA) th DS D 3. 3. Packaging and Internal CircuitPackaging and Internal Circuit 3. 3. Packaging and Internal CircuitPackaging and Internal Circuit 1, 2, 3: Source 4: Gate 5, 6, 7, 8: Drain DSOP Advance(WF)M Start of commercial production 2019-11 2019-2020 2020-06-24 1 Toshiba Electronic Devices & Storage Corporation Rev.5.0XPW6R30ANB 4. 4. 4. 4. Absolute Maximum Ratings (Note) (TAbsolute Maximum Ratings (Note) (TAbsolute Maximum Ratings (Note) (TAbsolute Maximum Ratings (Note) (T = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) aaaa Characteristics Symbol Rating Unit Drain-source voltage V 100 V DSS Gate-source voltage V 20 GSS Drain current (DC) (Note 1) I 45 A D Drain current (pulsed) (Note 1) I 135 DP Power dissipation (T = 25 ) (Note 6) P 132 W c D Power dissipation (t = 10 s) (Note 2) 3.0 Power dissipation (t = 10 s) (Note 3) 0.96 Single-pulse avalanche energy (Note 4) E 137 mJ AS Single-pulse avalanche current I 45 A AS Channel temperature (Note 5) T 175 ch Storage temperature (Note 5) T -55 to 175 stg Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook Handling PrecautionDerating Concept and Method) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note: When the body or a connecting part of a semiconductor product is subjected to vibration, impact or stress in actual equipment, bonding fault or device destruction may result. Therefore, be sure to keep this in mind at the time of structural design. If a semiconductor product is subject to especially strong vibration, impact or stress, the package or chip may crack. If stress is applied to a semiconductor chip through the package, changes in the resistance of the chip may result due to piezoelectric effects, resulting in fluctuation in element characteristics. Furthermore, if a stress that does not instantly result in damage is applied continually for a long period of time, product deformation may result, causing defects such as disconnection or element failure. Thus, at the time of structural design, carefully consider vibration, impact and stress. 2019-2020 2020-06-24 2 Toshiba Electronic Devices & Storage Corporation Rev.5.0