74VHC9595FT(BJ)

74VHC9595FT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC9595FT74VHC9595FT74VHC9595FT74VHC9595FT 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description 8-Bit Shift Register/Latch 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74VHC9595FT is an advanced high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. 74VHC9595FT combines low power consumption of CMOS with Schottky TTL speeds. Shift operation is accomplished on the positive going transition of the SCK input. The output register is loaded with the contents of the shift register on the positive going transition of the RCK input. Since RCK and SCK signal are independent, parallel outputs can be held stable during the shift operation. This register can be used in serial-to-parallel conversion, data receivers, etc. All the inputs have hysteresis between the positive-going and negative-going thresholds. Thus the 74VHC9595FT is capable of squaring up transitions of slowly changing input signals and provides an improved noise immunity. Additionally, all the inputs have a newly developed protection circuit without a diode returned to V . This CC enables the inputs to be tolerant of up to 5.5 volts even when power supply is down. The input power-down protection capability makes the 74VHC9595FT ideal for a wide range of applications, such as interfacing between different voltages, voltage translation from 5 V to 3 V and battery back-up circuits. A variant of the TC 74HC/VHC/AHC/LV595, the 74VHC9595FT contains negative-edge-triggered flip-flops to improve timing margins that are affected by long wires or slowly changing clocks when multiple parts are cascaded together. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: T = -40 to 125 opr (3) High speed: f = 224 MHz (typ.) at V = 5.0 V MAX CC (4) Low power dissipation: I = 4.0 A (max) at T = 25 CC a (5) Power-down protection is provided on all inputs. (6) Balanced propagation delays: t t PLH PHL (7) Wide operating voltage range: V = 2.0 V to 5.5 V CC(opr) Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Start of commercial production 2014-12 2016 Toshiba Corporation 2016-08-05 1 Rev.2.074VHC9595FT 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP16B 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 2016 Toshiba Corporation 2016-08-05 2 Rev.2.0