74HC4050D(BJ)

74HC4049D,74HC4050D CMOS Digital Integrated Circuits Silicon Monolithic 74HC4049D,74HC4050D 1. Functional Description Hex Buffer 74HC4049D: HEX BUFFER/CONVERTER (INVERTING) 74HC4050D: HEX BUFFER/CONVERTER 2. General The 74HC4049D and 74HC4050D are high speed CMOS HEX BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 74HC4049D is an inverting buffer, while the 74HC4050D is a non-inverting buffer. The internal circuits are composed of 3-stages (74HC4049D) or 2-stages (74HC4050D) of inverter, which provided high noise immunity and stable output. Input protection circuits are different from those of other high speed CMOS IC s. They eliminate the diodes on the V side thus providing of logic-level conversion from high-level voltages up to 15 V to low-level voltages. CC They are useful for battery back up circuits, because input voltage can be applied on IC s which are not biased by V . CC 3. Features (1) Wide operating temperature range: T = -40 to 125 (Note 1) opr (2) High speed: t = 8 ns (typ.) at V = 6.0 V pd CC (3) Low power dissipation: I = 1.0 A (max) at T = 25 CC a (4) Balanced propagation delays: t t PLH PHL (5) Wide operating voltage range: V = 2.0 V to 6.0 V CC(opr) Note 1: Operating Range spec of T = -40 to 125 is applicable only for the products which manufactured after opr July 2020. 4. Packaging SOIC16 Start of commercial production 2020-07 2016-2020 2020-11-17 1 Toshiba Electronic Devices & Storage Corporation Rev.4.074HC4049D,74HC4050D 5. Pin Assignment 74HC4049D 74HC4050D 6. Marking 74HC4049D 74HC4050D 7. IEC Logic Symbol 74HC4049D 74HC4050D 8. Truth Table Input A Output Y (74HC4049D) Output Y (74HC4050D) L H L H L H 2016-2020 2020-11-17 2 Toshiba Electronic Devices & Storage Corporation Rev.4.0