TS4994IST

TS4994 1W differential input/output audio power amplifier with selectable standby Features Pin connections (top view) Differential inputs Near-zero pop & click TS4994IQT - DFN10 100dB PSRR 217Hz with grounded inputs Operating range from V = 2.5V to 5.5V CC STSTBBYY 111 101010 VV O+O+ 1W rail-to-rail output power V =5V, CC VV 222 999 VV IN -IN - DDDD THD = 1%, F = 1kHz, with 8 load STSTBY MBY MOODDEE 333 888 N/N/CC 90dB CMRR 217Hz VV IN +IN + 444 777 GNGNDD Ultra-low consumption in standby mode (10nA) BBYPAYPASSSS 555 666 VV O-O- Selectable standby mode (active low or active high) TS4994IST - MiniSO-8 Ultra fast startup time: 15ms typ. Available in DFN10 3x3 (0.5mm pitch) & STBYSTBY VV 11 88 O+O+ MiniSO-8 VV ININ-- VccVcc 22 77 All lead-free packages VV GNGNDD ININ++ 33 66 BYPBYPASSASS VV 44 55 O-O- Description biased at V /2 regardless of the input common CC The TS4994 is an audio power amplifier capable mode voltage. of delivering 1W of continuous RMS output power into an 8 load 5V. Due to its differential inputs, The TS4994 is designed for high quality audio it exhibits outstanding noise immunity. applications such as mobile phones and requires few external components. An external standby mode control reduces the supply current to less than 10nA. An STBY MODE pin allows the standby to be active HIGH Applications or LOW (except in the MiniSO-8 version). An Mobile phones (cellular / cordless) internal thermal shutdown protection is also provided, making the device capable of sustaining Laptop / notebook computers short-circuits. PDAs The device is equipped with common mode Portable audio devices feedback circuitry allowing outputs to be always Order codes Part number Temperature range Package Packing Marking TS4994IQT DFN10 K994 -40C to +85C Tape & reel TS4994IST MiniSO-8 K994 December 2006 Rev 6 1/35 www.st.com 35Contents TS4994 Contents 1 Application component information 3 2 Absolute maximum ratings and operating conditions . 5 3 Electrical characteristics . 6 4 Application information . 21 4.1 Differential configuration principle 21 4.2 Gain in typical application schematic 21 4.3 Common mode feedback loop limitations . 21 4.4 Low and high frequency response 22 4.5 Calculating the influence of mismatching on PSRR performance 23 4.6 CMRR performance . 25 4.7 Power dissipation and efficiency . 26 4.8 Decoupling of the circuit 28 4.9 Wake-up time: t WU 28 4.10 Shutdown time . 29 4.11 Pop performance . 29 4.12 Single-ended input configuration . 29 4.13 Demoboard 30 5 Package mechanical data 31 5.1 DFN10 package 32 5.2 MiniSO-8 package 33 6 Revision history . 34 2/35