STHDLS101T AC coupled HDMI level shifter with configurable HPD output Features Converts low-swing alternating current (AC) coupled differential input to high-definition multimedia interface (HDMI) rev 1.3 compliant HDMI level shifting operation up to 2.7 Gbps per lane Integrated 50- termination resistors for AC- coupled differential inputs Input/output transition minimized differential signaling (TMDS) enable/disable QFN-48 Output slew rate control on TMDS outputs to (7 x 7 mm) minimize electromagnetic interference (EMI) Fail safe outputs for backdrive protection No re-timing or configuration required Inter-pair output skew < 250 ps Description Intra-pair output skew < 10 ps The STHDLS101T is a high-speed high-definition Single power supply of 3.3 V multimedia interface (HDMI) level shifter that converts low-swing AC coupled differential input ESD protection: 6 KV HBM on all I/O pins to HDMI 1.3 compliant open-drain current Integrated display data channel (DDC) level steering RX-terminated differential output. shifters. Pass-gate voltage limiters allow 3.3 V Through the existing PCI-E pins in the graphics termination on graphics and memory controller and memory controller hub (GMCH) of PCs or hub (GMCH) pins and 5 V DDC termination on notebook motherboards, the pixel clock provides HDMI connector pins the required bandwidth (1.65 Gbps, 2.25 Gbps) Level shifter and configurable output for HPD for the video supporting 720p, 1080i, 1080p with a signal from HDMI/DVI connector total of 36-bit resolution. The HDMI is multiplexed onto the PCIe pins in the motherboard where the Integrated pull-down resistor on HPD SINK AC coupled HDMI at 1.2 V is output by GMCH. and OE N inputs The AC coupled HDMI is then level shifter by this device to 3.3 V DC coupled HDMI output. Applications The STHDLS101T supports up to 2.7 Gbps, Notebooks which is enough for 12-bits of color depth per PC motherboards and graphic cards channel, as indicated in HDMI rev 1.3. The device operates from a single 3.3 V supply and is Dongles/cable adapters available in a 48-pin QFN package. Table 1. Device summary Order code Package Packaging STHDLS101TQTR QFN-48 Tape and reel December 2008 Rev 3 1/26 www.st.com 26 Obsolete Product(s) - Obsolete Product(s)Contents STHDLS101T Contents 1 Block diagram 3 2 System interface 4 3 Pin configuration 6 3.1 Pin description 7 4 Functional description 11 5 Maximum ratings . 13 5.1 Recommended operating conditions 14 5.1.1 Power supply and temperature range 14 5.1.2 Differential inputs (IN D signals) 14 5.2 TMDS outputs (OUT D signals) 15 5.3 HPD input and output characteristics 16 5.4 DDC input and output chatacteristics 17 5.5 OE input characteristics . 18 5.6 HPD input resistor 18 5.7 ESD performance . 18 6 Application information . 19 6.1 Power supply sequencing . 19 6.2 Supply bypassing . 19 6.3 Differential traces . 19 7 Package mechanical data 20 8 Revision history . 24 2/26 Obsolete Product(s) - Obsolete Product(s)