Product Information

M95128-DFCS6TP/K

M95128-DFCS6TP/K electronic component of STMicroelectronics

Datasheet
EEPROM 128Kb SPI Bus EEPROM w/ hi-spd clock

Manufacturer: STMicroelectronics
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Price (USD)

1: USD 1.9233 ea
Line Total: USD 1.92

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
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Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 1
Multiples : 1

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M95128-DFCS6TP/K
STMicroelectronics

1 : USD 1.9233
10 : USD 0.9726
25 : USD 0.6988
50 : USD 0.6945
100 : USD 0.6208

     
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M95128-W M95128-R M95128-DF Datasheet 128-Kbit serial SPI bus EEPROM with high-speed clock Features Compatible with the serial peripheral interface (SPI) bus SO8N Memory array 128 Kbit (16 Kbytes) of EEPROM 150 mil width Page size: 64 bytes Additional write lockable page (Identification page) Write time Byte Write within 5 ms Page Write within 5 ms TSSOP8 Write protect 169 mil width quarter array half array whole memory array High-speed clock: 20 MHz Single supply voltage: UFDFPN8 (MC) 2.5 V to 5.5 V for M95128-W DFN8 - 2x3 mm 1.8 V to 5.5 V for M95128-R 1.7 V to 5.5 V for M95128-DF Operating temperature range: from -40 C up to +85 C WLSCP (CS) Enhanced ESD protection More than 4 million Write cycles Product status link More than 200-year data retention M95128-DF Packages SO8 (ECOPACK2 ) M95128-R TSSOP8 (ECOPACK2 ) M95128-W UFDFPN8 (ECOPACK2 ) WLCSP (ECOPACK2 ) DS1356 - Rev 20 - October 2020 www.st.com For further information contact your local STMicroelectronics sales office.M95128-W M95128-R M95128-DF Description 1 Description The M95128 devices are electrically erasable programmable memories (EEPROMs) organized as 16384 x 8 bits, accessed through the SPI bus. The M95128-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95128-R can operate with a supply voltage from 1.8 V to 5.5 V and the M95128-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 C / +85 C. The M95128-DF offers an additional page, named the Identification page (64 bytes). The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode. Figure 1. Logic diagram VCC D C S M95xxx Q W HOLD V SS The SPI bus signals are C, D and Q, as shown in Figure 1. Logic diagram and Table 1. Signal names. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low. Table 1. Signal names Signal name Function Direction C Serial clock Input D Serial data input Input Q Serial data output Output S Chip select Input W Write protect Input HOLD Hold Input V Supply voltage - CC V Ground - SS DS1356 - Rev 20 page 2/48

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
C-Max
C-Max (VA)
SG3
ST
ST MICROELECTRONICS
ST2
ST7
STM
STMICRELECTRONICS
STN

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