Si1000-E-GM2

Si1000/1/2/3/4/5 Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240960 MHz EZRadioPRO Transceiver Ultra Low Power: 0.9 to 3.6 V Operation EZRadioPRO Transceiver - Typical sleep mode current < 0.1 A retains state and - Frequency range = 240960 MHz RAM contents over full supply range fast wakeup of < 2 s - Sensitivity = 121 dBm - Less than 600 nA with RTC running - FSK, GFSK, and OOK modulation - Less than 1 A with RTC running and radio state retained - Max output power = +20 dBm (Si1000/1), +13 dBm - On-chip dc-dc converter allows operation down to 0.9 V. (Si1002/3/4/5) - Two built-in brown-out detectors cover sleep and active - RF power consumption modes - 18.5 mA receive 10-Bit Analog to Digital Converter - 18 mA +1 dBm transmit - Up to 300 ksps - 30 mA +13 dBm transmit - Up to 18 external inputs - 85 mA +20 dBm transmit - External pin or internal VREF (no external capacitor - Data rate = 0.123 to 256 kbps required) - Auto-frequency calibration (AFC) - Built-in temperature sensor - Antenna diversity and transmit/receive switch control - External conversion start input option - Programmable packet handler - Autonomous burst mode with 16-bit automatic averaging - TX and RX 64 byte FIFOs accumulator - Frequency hopping capability Dual Comparators - On-chip crystal tuning - Programmable hysteresis and response time Digital Peripherals - Configurable as interrupt or reset source - Low current (< 0.5 A) - 19 or 16 port I/O plus 3 GPIO pins Hardware enhanced 2 On-Chip Debug UART, SPI, and I C serial ports available concurrently - Low power 32-bit SmaRTClock - On-chip debug circuitry facilitates full-speed, non-intrusive in-system debug (No emulator required) - Four general purpose 16-bit counter/timers six channel - Provides breakpoints, single stepping programmable counter array (PCA) - Inspect/modify memory and registers Clock Sources - Complete development kit - Precision internal oscillators: 24.5 MHz with 2% accuracy High-Speed 8051 C Core supports UART operation spread-spectrum mode for - Pipelined instruction architecture executes 70% of instruc- reduced EMI Low power 20 MHz internal oscillator tions in 1 or 2 system clocks - External oscillator: Crystal, RC, C, CMOS clock - Up to 25 MIPS throughput with 25 MHz clock - SmaRTClock oscillator: 32.768 kHz crystal or self-oscillate - Expanded interrupt handler - Can switch between clock sources on-the-fly useful in Memory implementing various power saving modes Package - 4352 bytes internal data RAM (256 + 4096) - 64 kB (Si1000/2/4) or 32 kB (Si1001/3/5) flash In-system - 42-pin LGA (5 x 7 mm) programmable in 1024-byte sectors1024 bytes are Temperature Range: 40 to +85 C reserved in the 64 kB devices ANALOG DIGITAL I/O EZRadioPRO UART PERIPHERALS (240960 MHz) Port 0 SMBus EZRadio SPI LNA A 10-bit IREF PRO M PCA 300 ksps U Serial Timer 0 ADC X Interface PA Timer 1 + + Port 1 Timer 2 VREF TEMP Mixer Timer 3 SENSOR Port 2 VREG VOLTAGE PGA CRC COMPARATORS ADC 24.5 MHz PRECISION 20 MHz LOW POWER INTERNAL OSCILLATOR INTERNAL OSCILLATOR Digital External Oscillator HARDWARE smaRTClock Modem PLL Delta HIGH-SPEED CONTROLLER CORE Sigma Modulator 64/32 kB 8051 CPU 4352 B OSC Digital ISP FLASH (25 MIPS) SRAM Logic FLEXIBLE DEBUG POR WDT INTERRUPTS CIRCUITRY Rev. 1.3 2/13 Copyright 2013 by Silicon Laboratories Si1000/1/2/3/4/5 Not Recommended for New Designs CROSSBARSi1000/1/2/3/4/5 2 Rev. 1.3 Not Recommended for New Designs