EFR32BG21A010F1024IM32-BR

EFR32BG21 Blue Gecko Wireless SoC Family Data Sheet The Blue Gecko family of SoCs is part of the Wireless Gecko port- KEY FEATURES folio. Blue Gecko SoCs are ideal for enabling energy-friendly Blue- tooth 5 networking for IoT devices. 32-bit ARM Cortex-M33 core with 80 MHz maximum operating frequency The single-die solution combines an 80 MHz ARM Cortex-M33 with a high performance Up to 1024 kB of flash and 96 kB of RAM 2.4 GHz radio to provide an industry-leading, energy efficient wireless SoC for IoT con- 12-channel Peripheral Reflex System nected applications. enabling autonomous interaction of MCU peripherals Blue Gecko applications include: Integrated PA with up to 20 dBm (2.4 GHz) TX power Lighting Robust peripheral set and up to 20 GPIO Connected Home in a 4x4 QFN package Gateways and Digital Assistants Building Automation and Security Core / Memory Clock Management Energy Security Management Crypto Acceleration Secure Boot with HF Crystal HF Fast Startup Root of Trust and True Random TM Oscillator RC Oscillator Voltage ARM Cortex M33 processor RC Oscillator Secure Loader Number Generator Flash Program Regulator with DSP extensions, Memory DPA FPU and Trust Zone EM23 HF RC Countermeasures EUI Brown-Out Oscillator Secure Debug Detector Authentication LDMA LF Crystal Ultra LF RC LF ETM Secure Debug RAM Memory Oscillator RC Oscillator Power-On Reset Controller Oscillator Secure Element 32-bit bus Peripheral Reflex System Radio Transceiver Serial I/O Ports Timers and Triggers Analog I/F Interfaces DEMOD External IADC RF Frontend USART Timer/Counter Protocol Timer Interrupts I LNA Q IFADC General Analog PGA 2 Low Energy Timer Watchdog Timer I C Purpose I/O Comparator PA AGC Real Time Pin Reset Capture Counter Frequency PA Synth Back-Up Real MOD Pin Wakeup Time Counter Lowest power mode with peripheral operational: EM0Active EM1Sleep EM2Deep Sleep EM3Stop EM4Shutoff silabs.com Building a more connected world. Rev. 1.1 CRC FRC RAC BUFCEFR32BG21 Blue Gecko Wireless SoC Family Data Sheet Feature List 1. Feature List The EFR32BG21 highlighted features are listed below. Low Power Wireless System-on-Chip Wide selection of MCU peripherals 12-bit 1 Msps SAR Analog to Digital Converter (ADC) High Performance 32-bit 80 MHz ARM Cortex -M33 with DSP instruction and floating-point unit for efficient signal 2 Analog Comparator (ACMP) processing Up to 20 General Purpose I/O pins with output state reten- Up to 1024 kB flash program memory tion and asynchronous interrupts Up to 96 kB RAM data memory 8 Channel DMA Controller 2.4 GHz radio operation 12 Channel Peripheral Reflex System (PRS) TX power up to 20 dBm 2 16-bit Timer/Counter Low Energy Consumption 3 Compare/Capture/PWM channels 8.8 mA RX current at 2.4 GHz (1 Mbps GFSK) 1 32-bit Timer/Counter 9.3 mA TX current 0 dBm output power at 2.4 GHz 3 Compare/Capture/PWM channels 33.8 mA TX current 10 dBm output power at 2.4 GHz 32-bit Real Time Counter 50.9 A/MHz in Active Mode (EM0) 24-bit Low Energy Timer for waveform generation 5.0 A EM2 DeepSleep current 2 Watchdog Timer 3 Universal Synchronous/Asynchronous Receiver/Trans- (96 kB RAM retention and RTC running from LFXO) 2 mitter (UART/SPI/SmartCard(ISO 7816)/IrDA/I S) 4.5 A EM2 DeepSleep current 2 2 I C interface with SMBus support (16 kB RAM retention and RTC running from LFRCO) Wide Operating Range High Receiver Performance 1.71 to 3.8 V single power supply -97.5 dBm sensitivity 1 Mbit/s GFSK -40 to 125 C ambient -94.4 dBm sensitivity 2 Mbit/s GFSK Security -104.9 dBm sensitivity 125 kbps GFSK Secure Boot with Root of Trust and Secure Loader (RTSL) Supported Modulation Format Hardware Cryptographic Acceleration with DPA counter- GFSK measures for AES128/256, SHA-1, SHA-2 (up to 256-bit), ECC (up to 256-bit), ECDSA, ECDH and J-Pake Protocol Support True Random Number Generator (TRNG) compliant with Bluetooth Low Energy (Bluetooth 5) NIST SP800-90 and AIS-31 ARM TrustZone Secure Debug with lock/unlock QFN32 4x4 mm Package 0.4 mm pitch silabs.com Building a more connected world. Rev. 1.1 2