Product Information

570CAC000900DG

570CAC000900DG electronic component of Silicon Labs

Datasheet
Programmable Oscillators Differential/single-ended; I2C programmable XO; OE pin 2; 10-1417 MHz

Manufacturer: Silicon Labs
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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0 - Warehouse 1

MOQ : 50
Multiples : 50

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570CAC000900DG
Silicon Labs

50 : USD 15.824
100 : USD 15.824
250 : USD 15.824
500 : USD 15.824
1000 : USD 15.824
2500 : USD 15.824
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Si570/Si571 2 10 MHZ TO 1.4 GHZ I C PROGRAMMABLE XO/VCXO Features Any programmable output Internal fixed crystal frequency frequencies from 10 to 945 MHz and ensures high reliability and low Si5602 select frequencies to 1.4 GHz aging 2 Available LVPECL, CMOS, I C serial interface LVDS, and CML outputs 3rd generation DSPLL with superior Industry-standard 5x7 mm jitter performance package 3x better frequency stability than Pb-free/RoHS-compliant SAW-based oscillators 1.8, 2.5, or 3.3 V supply Applications Ordering Information: SONET/SDH High performance See page 31. xDSL instrumentation 10 GbE LAN/WAN Low-jitter clock generation ATE Optical modules Pin Assignments: Clock and data recovery See page 30. Description (Top View) The Si570 XO/Si571 VCXO utilizes Skyworks Solutions advanced DSPLL SDA circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user- 7 programmable to any output frequency from 10 to 945 MHz and select frequencies 2 NC V 1 6 to 1400 MHz with <1 ppb resolution. The device is programmed via an I C serial DD interface. Unlike traditional XO/VCXOs where a different crystal is required for each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL OE 2 5 CLK clock synthesis IC to provide any-frequency operation. This IC-based approach allows the crystal resonator to provide exceptional frequency stability and reliability. In addition, DSPLL clock synthesis provides superior supply noise GND 3 4 CLK+ rejection, simplifying the task of generating low-jitter clocks in noisy environments 8 typically found in communication systems. SCL Functional Block Diagram Si570 CLK- CLK+ V DD SDA 7 OE V C 1 6 V DD 10-1400 MHz Fixed Frequency DSPLL Clock SDA XO Synthesis SCL OE 2 5 CLK Si571 only GND 3 4 CLK+ ADC 8 SCL GND Si571 V C Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Rev. 1.6 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice November 15, 2021 Si570/Si571 TABLE OF CONTENTS Section Page 1. Detailed Block Diagrams .3 2. Electrical Specifications .4 3. Functional Description .14 3.1. Programming a New Output Frequency 14 3.2. Si570 Programming Procedure .18 3.3. Si570 Troubleshooting FAQ .20 2 3.4. I C Interface .21 4. Serial Port Registers .22 5. Si570 (XO) Pin Descriptions .29 6. Si571 (VCXO) Pin Descriptions .30 7. Ordering Information .31 8. Si57x Mark Specification 32 9. Outline Diagram and Suggested Pad Layout .33 10. 8-Pin PCB Land Pattern 34 Revision History .35 2 Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Rev. 1.6 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice November 15, 2021

Tariff Desc

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