Product Information

K7R641882M-EC20000

K7R641882M-EC20000 electronic component of Samsung

Datasheet
2MX36 AND 4MX18 AND 8MX9 QDR II B2 SRAM

Manufacturer: Samsung
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

4: USD 13.5548 ea
Line Total: USD 54.22

0 - Global Stock
MOQ: 4  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Fri. 10 May to Thu. 16 May

MOQ : 4
Multiples : 1
4 : USD 13.5548
10 : USD 12.809

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Brand
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K7R643682M K7R641882M TM K7R640982M 2Mx36 & 4Mx18 & 8Mx9 QDR II b2 SRAM 72Mb QDRII SRAM Specification 165 FBGA with Pb & Pb-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON ASAS I BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or simi- lar applications where Product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.3 March 2007 - 1 -K7R643682M K7R641882M TM K7R640982M 2Mx36 & 4Mx18 & 8Mx9 QDR II b2 SRAM Document Title TM 2Mx36-bit, 4Mx18-bit, 8Mx9-bit QDR II b2 SRAM Revision History Draft Date Remark Rev. No. History Advance Sep, 14 2002 0.0 1. Initial document. Preliminary Oct. 24, 2002 0.1 1. Update AC timing characteristics. 2. Change the JTAG instruction coding. Preliminary Feb. 18, 2003 0.2 1. Change the AC timing characteristics. (-25/-20 parts) 2. Correct the overshoot and undershoot timing diagrams. 3. Change the JTAG Block diagrams. 4. Update the Boundary scan exit order. Preliminary Mar. 20, 2003 0.3 1. Correct the JTAG ID register definition 2. Correct the AC timing parameter (delete the tKHKH Max value) Preliminary Aug. 16, 2004 0.4 1. Add the Power-on Sequence specification Preliminary Oct. 18, 2004 0.5 1. Correct the pin name table Preliminary May. 17, 2005 0.6 1. Update the power consumption (Icc & Isb) Final Aug. 2, 2005 1.0 1. Finalize the datasheet Final Jul. 6, 2006 1.1 1. Add Pb-free comment 2. Change the Max. clock cycle time in AC TIMING CHARACTERIS- TICS Final Jan. 23, 2007 1.2 1. Correct the pin name table Final Mar. 5, 2007 1.3 1. Add Detail Specification of Power up Sequence Rev. 1.3 March 2007 - 2 -

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
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