DATASHEET TW6872 FN8616 Rev 0.00 Triple-Rate (SD/HD/3G) SDI Transmitter with VC-2 Encoder and Audio Decoder May 23, 2014 The TW6872 is a triple-rate (SD/HD/3G) SDI transmitter. It Features receives parallel BT.656/BT.1120/ASI video data from a Triple-rate (SD/HD/3G) SDI transmitter for Standard CMOS sensor/ISP chip. It also receives analog audio, or serial Definition (SD) and High Definition (HD), and 3G 10-bit digital audio. The TW6872 serializes the video and audio into component video an SDI stream and transmits it to an SDI receiver via its integrated cable driver. Encoding SDI standard of ITU-R BT.656/SMPTE 259M Level C, ITU-R BT.1120/SMPTE ST 292, SMPTE 424M 10-bit In addition to the standard SDI format with uncompressed raw parallel component video inputs into 10-bit serial video video data, TW6872 can optionally compress video with a output visually lossless VC-2 compression algorithm to send the video BT.656/BT.1120 interface for CMOS sensor/ISP chip formats normally running at HD rate (1.5Gbps) on the cable at SD rate (270Mbps), and therefore achieve longer cable reach. Asynchronous Serial Interface (ASI) for IEC 13818-1 compliant transport streams Together, the TW6872 and Intersils TW6874 SDI receiver provide a complete end-to-end SDI link solution and can Integrated 75 cable driver with pre/de-emphasis operate with or without VC-2 compression. Integrated Integrated VC-2 encoder allows transmission of HD video audio/video test patterns and PRBS checker ease system over SD transmission lengths design and implementation. Analog audio and I2S serial audio input interfaces over The TW6872 is available in a 76 Ld QFN. It is specified for ancillary field operation over the -40C to +85C ambient temperature Digital audio with PCM encoding for embedding audio range and operates on two power supplies: 1V and 3.3V. A samples into the audio ancillary field of SDI stream single 27MHz crystal is used for all supported audio/video Single 27MHz clock/crystal input operating modes. Optional clock output for use as the ISP chips clock input to Applications enhance overall jitter SD/HD/3G-SDI Camera PRBS7/23 and video/audio pattern generator 2 I C for external micro-controller interface Low power consumption Small footprint LTZ-QFN76L (9mm x9mm) package Pb-free (RoHS compliant) 1.0V 3.3V 3.3V 0 CLK 1F CLKO 75 TW6874S CMOS 21 ISP DI RX SDO d VD SENSOR open* 3 u 3.3V DATA I2S 0 m 75 1F SDO m 75 COAX y 2.2F open* 75 TW6872 22pF AIN0 d 4.7k XTI u 27MHz m 2.2F XTO m AIN1 y 22pF 4.7k RSET *Final RLN values pending optimization. 1.6k Place holder for inductor recommended. IRQ HOST PROCESSOR AINN 2.2F I2C FIGURE 1. TW6872 TYPICAL APPLICATION FN8616 Rev 0.00 Page 1 of 44 May 23, 2014TW6872 Table of Contents Block Diagram 3 Pin Configuration 4 Pin Descriptions . 5 Ordering Information 7 Absolute Maximum Ratings . 8 Thermal Information . 8 Recommended Operating Conditions 8 Electrical Specifications . 8 Video Input Modes 11 Video Bit Mapping . 11 Master/Slave Mode 13 Asynchronous Serial Interface Mode 13 SDI Video Output . 13 SDI Video Standard Formats 13 Cable Reach 13 Pre/De-Emphasis 13 VC-2 Compressed Data . 14 Audio Input Interface . 14 Analog Audio . 14 I2S Digital Audio 15 SDI Ancillary Audio 15 Layout Guidelines 15 SDO Routing 15 Power Supply Routing 17 Parallel Video Routing 18 Power Supply Bypassing 18 Other Information 19 Power Supply Sequencing 19 Ancillary Data . 19 Hardware Interrupt 19 Crystal and Clock Oscillator . 19 Link Checker 19 Test Patterns . 19 2 I C Communication Interface 19 Configuration Register Write 21 Configuration Register Read 21 2 I C Slave Address . 21 Register Address 21 Register Map 24 General 24 Ancillary Audio Configuration 30 Analog Audio Processor 37 Document Revision History 43 About Intersil 43 Package Outline Drawing 44 FN8616 Rev 0.00 Page 2 of 44 May 23, 2014