ISL62883CEVAL2Z

USERS MANUAL ISL62883CEVAL2Z AN1557 Rev 0.00 Evaluation Board Apr 1, 2010 Introduction Interface Connections The ISL62883CEVAL2Z evaluation board demonstrates V : Input Voltage to the Power Stage IN the performance of the ISL62883 multiphase -J5: V Positive Power Input IN synchronous-buck PWM V controller implementing CORE - TP31: V Positive Voltage Sense IN Intel IMVP-6.5 protocol. The ISL62883 features Intersil s -J6: V Return Power Input 3 IN Robust Ripple Regulator (R ) technology. An on-board - TP32: V Return Voltage Sense IN dynamic-load generator is included for evaluating the transient-load response. It applies a 300s pulse of V Regulated Output Voltage O: approximately 25m load across V and PGND. O - J11 and J12: V Positive Power Output O Contents of this document include: - J13 and J14: V Return Power Output O Design Criteria +5V: +5V Input Voltage Recommended Test Equipment - TP29: +5V Positive Input - TP30: +5V Return Input Interface Connections Switch Descriptions +12V: Input Voltage for the Dynamic-load Generator DIP Switch Descriptions - TP3: 12V Positive Input Jumper Descriptions - TP2: 12V Return Input Test Point Descriptions Test Set-up Evaluation Board Documentation ON - Bill of materials S3 J2 J1 OFF -Schematic 1 J6 J3 D1 S1 U2 - Silk-screen plots 0 1 PGND 0 VID0 VID1 -Board layer plots VIN VID2 VID3 J5 VID4 TABLE 1. DC/DC DESIGN CRITERIA + VID5 VIN J4 VID6 PARAMETER VALUE UNITS TP37 +3.3V V 4.5 to 20 VDC + IN TP35 TP36 TP29 +5V J7 J8 J9 5V J16 TP30 V 0 to 1.5 VDC O VCCSENSE VSSSENSE PHASE1 PHASE2 PHASE3 PGND Full-load 75 ADC ISL62883CEVAL2Z PWM Frequency 300 kHz TP3 J12 VCORE TP2 J14 Recommended Equipment ON PGND S2 OFF (QTY 1) Adjustable 25V, 10A Power Supply J13 PGND (QTY 1) Fixed 5V, 100mA Power Supply J10 J11 VCORE VCORE (QTY 1) Fixed 12V, 100mA Power Supply (QTY 1) Adjustable Constant Current Electronic Load FIGURE 1. TEST SET-UP (QTY 1) Digital Voltmeter (QTY 1) Four-Channel Oscilloscope Switch Descriptions S3: Enable - OFF: Short the VR ON pin to GND (disable PWM) - ON: Allow the VR ON pin to pull-up to +5V (enable PWM) S5: Dynamic Load - OFF: On-board dynamic load disabled - ON: On-board dynamic load enabled AN1557 Rev 0.00 Page 1 of 21 Apr 1, 2010 DPRSLPVR PSI ISL62883CEVAL2Z TP7: Monitor the DPRSLPVR pin. DIP-Switch Descriptions TP8: Monitor the VR TT pin. S1: Set the control signals TP9: Monitor the PSI pin. - S1.1: Set the DPRSLPVR signal TP10: Monitor the ISEN3/FB2 pin. - S1.2: Set the PSI signal TP11: Monitor the ISEN2 pin. U2: Set the VID TP12: Input side of the compensator. Jumper Descriptions TP13: Monitor the PGOOD pin. J1: Set the ISEN2 pin configuration. ISEN2 can be TP14: Monitor the VSEN pin. connected to the power stage, tied to +5V, GND or TP15: Monitor the ISEN1pin. left floating. Connect ISEN2 to the power stage TP16: Monitor the CLK EN pin. when the ISL62883 is configured for 3-phase or 2-phase application. Tie ISEN2 to 5V when the TP17: Monitor the VR ON pin ISL62883 is configured for 1-phase application. TP18: Monitor the RTN pin. J2: Set the ISEN1 pin configuration. ISEN1 can be TP19: Monitor the positive side of C82. connected to the power stage, tied to +5V, GND or TP20: Monitor the negative side of C82. left floating. Connect ISEN1 to the power stage TP21: Monitor the VID6 pin. when the ISL62883 is configured for 3-phase, 2-phase application. Leave ISEN1 floating when TP22: Monitor the VID5 pin. the ISL62883 is configured for 1-phase application TP23: Monitor the VID4 pin. J3: If installed, the ISEN3/FB2 pin will be TP24: Monitor the VID3 pin. connected to the power stage. If uninstalled, the TP25: Monitor the VID2 pin. ISEN3/FB2 pin will be disconnected from the power TP26: Monitor the VID1 pin. stage. Install J3 when the ISL62883 is configured for 3-phase application. Uninstall J3 when the TP27: Monitor the VID0 pin. ISL62883 is configured for 2-phase or 1-phase TP28: Monitor the IMON pin. application. TP29: +5V power supply positive input. J4: Set the PWM3 pin configuration. PWM3 can be TP30: +5V power supply return input. connected to the ISL6208 driver, tied to +5V, GND TP31: V positive voltage sense or left floating. Connect PWM3 to the ISL6208 IN driver when the ISL62883 is configured for TP32: V return voltage sense IN 3-phase application. Tie PWM3 to 5V when the TP33: Monitor MOSFET Q3 gate signal ISL62883 is configured for 2-phase or 1-phase TP34: Monitor MOSFET Q9 gate signal. application. TP35: Monitor the VCCSENSE pin of the CPU J16: If installed, the +5V rail supplies the +3.3V socket U4. rail to the auxiliary circuit on the board. DO NOT APPLY +3.3V TO TP37/TP30 WHILE J16 IS TP36: Monitor the VSSSENSE pin of the CPU socket INSTALLED ITLL SHORT THE +5V AND THE U4. +3.3V POWER SUPPLIES. When measuring TP37: +3.3V power supply positive input. board efficiency, uninstall J16 and apply +3.3V to TP38: Monitor the VTT1 rail of the CPU socket U4. TP/37/TP30. TP39: Monitor the VTT2 rail of the CPU socket U4. Test-point Descriptions J7: Scope-probe socket for measuring PHASE1 J8: Scope-probe socket for measuring PHASE2 J9: Scope-probe socket for measuring PHASE3 J10: Scope-probe socket for measuring V O J15: Scope-probe socket for measuring the current of the on-board transient-load emulator TP1: Monitor the on-board 1.2V power supply TP2: +12V power supply return input. TP3: +12V power supply positive input. TP4: Monitor the COMP pin TP5: Monitor the VW pin. TP6: Monitor the FB pin. AN1557 Rev 0.00 Page 2 of 21 Apr 1, 2010