USERS MANUAL ISL54220IRUEVAL1Z AN1449 Rev 0.00 Evaluation Board Jan 23, 2009 Description Features The ISL54220IRUEVAL1Z evaluation board is designed to Standard USB Connectors provide a quick and easy method for evaluating the Standard Banana Jacks for Power, Ground, V and BUS ISL54220 USB Switch IC. Logic Connections The ISL54220 device is a unique IC. To use this evaluation Jumpers to Allow a Device to be Powered through the board properly requires a thorough knowledge of the Host Controller operation of the IC. Refer to the data sheet for an Convenient Test Points and Connections for Test understanding of the functions and features of the device. Equipment Studying the devices truth-table along with its pinout diagram is the best way to get a quick understanding of how Picture of Evaluation Board (Top View) the part works. A picture of the main evaluation board is shown in Figure 1. The ISL54220 TQFN IC is soldered onto the evaluation board. It is located in the center of the board and is designated as U1. The evaluation board contains USB connectors to allow the user to easily interface with the IC to evaluate its functions, features, and performance. For example, with the board properly powered and configured, as shown in Figure 2, you can control the logic pins, SE and OE, to switch between the two high-speed USB devices while connected to a single USB host (computer). In a typical application, the ISL54220 dual SPDT device is used to select between two different USB transceiver sections of a media player. Logic control from a processor determines which section to connect to the computer. To change channels, the following sequence would possibly be followed: 1. A signal would be sent to take the OE pin High, to open all switches. The off-isolation of the ISL54220 device would allow the present active channel to properly disconnect from the computer. 2. The SEL pin would be set to select the other USB FIGURE 1. ISL54220IRUEVAL1Z EVALUATION BOARD channel. 3. The OE pin would then be taken Low to close the switches to make the connection between the computer and the other USB section of the player. This application note will guide the user through the process of configuring and using the evaluation board to evaluate the ISL54220 device. AN1449 Rev 0.00 Page 1 of 6 Jan 23, 2009ISL54220IRUEVAL1Z If SEL is driven Low (to ground) and EN = Low (to ground), the Board Architecture/Layout high-speed (HS) Channel 1 switches will be ON. In this state, Basic Layout of Evaluation Board the USB host controller (computer) connected at J5 will be The basic layout of the main board is as follows: Refer to connected through to the USB device connected at J6 and Figure 1. data will be able to be transmitted between the computer and the device. Power and Ground connections are at the top of the board at banana jacks (J1 and J2). If SEL is driven High (>1.4V) and EN = Low (to ground), the high-speed (HS) Channel 2 switches will be ON. In this state, Logic connections, SEL and OE, are at the top of the board the USB host controller (computer) connected at J5 will be at banana jacks (J4 and J3). connected through to the USB device connected at J7 and USB connection to an upstream host controller (Computer) data will be able to be transmitted between the computer and is made at J5, located on the left side of the board. the device. USB connections to downstream USB devices are made at If OE = High (>1.4V), all switches will be OFF. Neither device connectors J6 and J7, located on right side of the board. will be connected through to the host controller. voltage for the USB devices are made through banana V BUS In a typical application, the ISL54220 dual SPDT device is jacks J8 and J9. Optionally, V for the USB devices can BUS used to select between two different USB transceiver sections be connected to the Host Controller V through jumpers BUS JP4 and JP5. of a media player. Logic control from a processor determines which section to connect to the computer. To change channels, Located in the center of the board is the ISL54220 IC (U1). the following sequence would possibly be followed: The evaluation board has a pin 1 dot, to show how the IC should be oriented on to the evaluation board. The IC pin 1 1. A signal would be sent to take the OE pin High, to open all indicator dot needs to be aligned with the evaluation board switches. The off-isolation of the ISL54220 device would pin 1 dot indicator. allow the present active channel to properly disconnect from the computer. IC Power Supply 2. Then the SEL pin would be set to select the other USB A DC power supply connected at banana jacks J1 (VDD) and channel. J2 (GND) provides power to the ISL54220 IC. The IC requires pin would then be taken Low to close the switches 3. The OE a 2.7VDC to 5.5VDC power supply for proper operation. The to make the connection between the computer and the power supply should be capable of delivering 100A of current. other USB section of the player. V Power Supply BUS USB Connections A DC power supply connected at banana jacks J8 (VBUSCH1) A B type USB receptacle labeled USB TO HOST (J5) is and J9 (VBUSCH2) provides the V voltage required by the BUS located on the left side of the board. This receptacle should be USB devices. The devices require a DC power supply in the connected, using a standard USB cable, to the upstream USB range of 4.4V to 5.25V for proper operation. The power supply host controller, which is usually a PC computer or hub. When should be capable of delivering 100A of current. this connection is made, the ISL54220 device will connect the The J8 banana jack is connected to the V pin of the J6 A computer through to the USB device determined by the voltage BUS type USB receptacle. The J9 banana jack is connected to the at the SEL logic control pin. V pin of the J7 A type receptacle. BUS An A type USB receptacle labeled USB TO DEVICE 1 (J6) The V voltage can be provided from the USB host is located on the right side of the board. The USB device can BUS controller (computer) by installing a jumper at either JP4 or be plugged directly into this receptacle or through a standard JP5. USB cable. With a jumper at JP4, the V voltage from J5 gets routed to An A type USB receptacle labeled USB TO DEVICE 2 (J7) BUS the J6 connector. With this jumper installed, no DC supply is located on the right side of the board. The USB device can should be connected at the J8 (VBUSCH1) banana jack. be plugged directly into this receptacle or through a standard USB cable. With a jumper at JP5, the V voltage from J5 gets routed to BUS the J7 connector. With this jumper installed, no DC supply The USB switches are bi-directional, which allows the host should be connected at the J9 (VBUSCH2) banana jack. (computer) and downstream USB device to both send and receive data. Logic Control High-Speed Switches The state of the ISL54220 device is determined by the voltage at the SEL pin and the OE pin. Access to the SEL pin is The four HSx switches (HSD1-, HSD1+, HSD2-, HSD2+) are through the banana jack J4 (SEL) and access to the OE pin is bi-directional switches that can pass rail-to-rail signals. When through the banana jack J3 (OE). powered with a 3.3V supply, these switches have a nominal AN1449 Rev 0.00 Page 2 of 6 Jan 23, 2009