Product Information

74LVCHR162245APAG8

74LVCHR162245APAG8 electronic component of Renesas

Datasheet
Bus Transceivers 16-bit Bus Transceiv er w/3-State Outputs

Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 1.371 ea
Line Total: USD 1.37

2934 - Global Stock
Ships to you between
Wed. 22 May to Fri. 24 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2837 - WHS 1


Ships to you between Wed. 22 May to Fri. 24 May

MOQ : 1
Multiples : 1
1 : USD 1.4145
10 : USD 1.2765
100 : USD 1.0143
500 : USD 0.8637
1000 : USD 0.7118
2000 : USD 0.6647
4000 : USD 0.6578
10000 : USD 0.6532
24000 : USD 0.6325

     
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IDT74LVCHR162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74LVCHR162245A BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS Typical tSK(o) (Output Skew) < 250ps technology. This high-speed, low power device is ideal for asynchronous ESD > 2000V per MIL-STD-883, Method 3015 > 200V using communication between two buses (A and B). The Direction and Output machine model (C = 200pF, R = 0) Enable controls are designed to operate this device as either two indepen- VCC = 3.3V 0.3V, Normal Range dent 8-bit transceivers or one 16-bit transceiver. The direction control pin VCC = 2.7V to 3.6V, Extended Range (DIR) controls the direction of data flow. The output enable pin (OE) CMOS power levels (0.4 W typ. static) overrides the direction control and disables both ports. All inputs are All inputs, outputs, and I/O are 5V tolerant designed with hysteresis for improved noise margin. Supports hot insertion All pins can be driven from either 3.3V or 5V devices. This feature allows Available in TSSOP package the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCHR162245A has series resistors in the device output structure DRIVE FEATURES: which will significantly reduce line noise when used with light loads. The Balanced Output Drivers: 12mA driver has been designed to drive 12mA at the designated threshold Low switching noise levels. The LVCHR162245A has bus-hold which retains the inputs last state APPLICATIONS: whenever the input goes to a high impedance. This prevents floating inputs 5V and 3.3V mixed voltage systems and eliminates the need for pull-up/down resistors. Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM 24 1 1DIR 2DIR 25 48 1OE 2OE 36 47 1A1 2A1 2 13 1B1 2B1 35 46 1A2 2A2 3 14 1B2 2B2 33 44 1A3 2A3 16 5 1B3 2B3 32 43 1A4 2A4 6 17 1B4 2B4 41 30 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 B6 1 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 23 12 1B8 2B8 INDUSTRIAL TEMPERATURE RANGE OCTOBER 2015 1 DSC-4598/6IDT74LVCHR162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit VTERM Terminal Voltage with Respect to GND 0.5 to +6.5 V TSTG Storage Temperature 65 to +150 C 1DIR 1 48 1OE IOUT DC Output Current 50 to +50 mA 2 1B1 47 1A1 IIK Continuous Clamp Current, 50 mA IOK VI < 0 or VO < 0 3 1B2 46 1A2 ICC Continuous Current through each 100 mA 4 45 GND ISS VCC or GND GND 5 NOTE: 1B3 44 1A3 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 6 permanent damage to the device. This is a stress rating only and functional operation 1B4 1A4 43 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 7 42 VCC VCC conditions for extended periods may affect reliability. 8 1B5 41 1A5 9 40 1B6 1A6 10 GND 39 GND CAPACITANCE (TA = +25C, F = 1.0MHz) 11 1B7 38 (1) 1A7 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF 12 1B8 37 1A8 COUT Output Capacitance VOUT = 0V 6.5 8 pF 13 2B1 36 2A1 CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF 14 2B2 35 NOTE: 2A2 1. As applicable to the device type. 15 34 GND GND 16 2B3 33 2A3 PIN DESCRIPTION 17 2B4 32 2A4 Pin Names Description xOE Output Enable Input (Active LOW) 18 31 VCC VCC xDIR Direction Control Output 19 30 2B5 2A5 (1) xA x Side A Inputs or 3-State Outputs (1) 20 29 xBx Side B Inputs or 3-State Outputs 2B6 2A6 NOTE: GND 21 28 GND 1. These pins haveBus-Hol. All other pins are standard inputs, outputs, or I/Os. 22 2B7 27 2A7 23 26 2B8 2A8 (1) FUNCTION TABLE (EACH 8-BIT SECTION) 24 25 2DIR 2OE Inputs xOE xDIR Outputs TSSOP L L B Data to A Bus TOP VIEW L H A Data to B Bus H X High Z State NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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