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72V84L15PAG

72V84L15PAG electronic component of Renesas

Datasheet
FIFO 3.3V DUAL 4K X 9 ASYNC FI

Manufacturer: Renesas
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Availability Price Quantity
0 - Global Stock

MOQ : 238
Multiples : 238

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72V84L15PAG
Renesas

238 : USD 38.8752
N/A

Obsolete
0 - Global Stock

MOQ : 1
Multiples : 1

Stock Image

72V84L15PAG
Renesas

1 : USD 37.9967
10 : USD 35.7391
25 : USD 34.4964
34 : USD 33.3986
102 : USD 31.2653
N/A

Obsolete
     
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IDT72V81 3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO IDT72V82 DUAL 512 x 9, DUAL 1,024 x 9 IDT72V83 DUAL 2,048 x 9, DUAL 4,096 X 9 IDT72V84 DUAL 8,192 X 9 IDT72V85 LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: DESCRIPTION: The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs The IDT72V81/72V82/72V83/72V84/72V85 are dual-FIFO memories that The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs load and empty data on a first-in/first-out basis. These devices are functional and The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs compatible to two IDT72V01/72V02/72V03/72V04/72V05 FIFOs in a single The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs package with all associated control, data, and flag lines assigned to separate The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs pins. The devices use Full and Empty flags to prevent data overflow and Low power consumption underflow and expansion logic to allow for unlimited expansion capability in both Active: 330 mW (max.) word size and depth. Power-down: 18 mW (max.) The reads and writes are internally sequential through the use of ring Ultra high speed15 ns access time pointers, with no address information required to load and unload data. Data Asynchronous and simultaneous read and write is toggled in and out of the devices through the use of the Write (W) and Read Offers optimal combination of data capacity, small foot print (R) pins. and functional flexibility The devices utilize a 9-bit wide data array to allow for control and parity Ideal for bidirectional, width expansion, depth expansion, bus- bits at the users option. This feature is especially useful in data communications matching, and data sorting applications applications where it is necessary to use a parity bit for transmission/reception Status Flags: Empty, Half-Full, Full error checking. It also features a Retransmit (RT) capability that allows for reset Auto-retransmit capability of the read pointer to its initial position when RT is pulsed low to allow for High-performance CMOS technology retransmission from the beginning of data. A Half-Full Flag is available in the Space-saving TSSOP package single device mode and width expansion modes. Industrial temperature range (40C to +85C) is available These FIFOs are fabricated using high-speed CMOS technology. They are Green parts available, see ordering information designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. FUNCTIONAL BLOCK DIAGRAM DATA INPUTS DATA INPUTS (DA0-DA8) RSA (DB0-DB8) RSB WB WRITE WRITE WA CONTROL CONTROL RAM RAM ARRAY A ARRAY A 512 x 9 512 x 9 1,024 x 9 1,024 x 9 WRITE READ WRITE READ 2,048 x 9 2,048 x 9 POINTER 4,096 x 9 POINTER 4,096 x 9 POINTER POINTER 8,192 x 9 8,192 x 9 THREE- THREE- STATE STATE BUFFERS BUFFERS READ READ RA RESET CONTROL RESET CONTROL LOGIC LOGIC FLAG FLAG LOGIC LOGIC EXPANSION EXPANSION LOGIC LOGIC XIA FFA EFA RB XIB XOA/HFA DATA FLA/RTA XOB/HFB FFB EFB DATA FLB/RTB OUTPUTS OUTPUTS 3966 drw 01 (QA0-QA8) (QB0-QB8) IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The AsyncFIFO is a trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES NOVEMBER 2017 1 DSC-3966/6 2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.COMMERCIAL AND INDUSTRIAL IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO TEMPERATURE RANGES 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol Rating Com l & Ind l Unit VTERM Terminal Voltage 0.5 to +7.0 V with Respect to GND FFA 1 56 XIA QA0 DA0 2 55 TSTG Storage Temperature 55 to +125 C QA1 DA1 3 54 IOUT DC Output Current 50 to +50 mA QA2 DA2 4 53 QA3 DA3 NOTE: 5 52 QA8 DA8 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 6 51 GND WA permanent damage to the device. This is a stress rating only and functional operation of 7 50 RA VCC the device at these or any other conditions above those indicated in the operational 8 49 QA4 DA4 sections of this specification is not implied. Exposure to absolute maximum rating 9 48 QA5 conditions for extended periods may affect reliability. 10 47 DA5 QA6 11 46 DA6 QA7 12 45 DA7 RECOMMENDED DC OPERATING XOA/HFA 13 44 FLA/RTA EFA CONDITIONS 14 43 RSA FFB 15 42 XIB Symbol Parameter Min. Typ. Max. Unit QB0 16 41 DB0 VCC Supply Voltage 3.0 3.3 3.6 V QB1 17 40 DB1 QB2 18 39 DB2 GND Supply Voltage 0 0 0 V QB3 19 38 DB3 (1) VIH Input High Voltage 2.0 VCC+0.5 V QB8 20 37 DB8 (2) GND 21 36 WB VIL Input Low Voltage 0.8 V RB 22 35 VCC TA Operating Temperature Commercial 0 70 C QB4 DB4 23 34 TA Operating Temperature Industrial -40 85 C QB5 24 33 DB5 QB6 25 32 DB6 NOTES: QB7 26 31 DB7 1. For RT/RS/XI input, VIH = 2.6V (commercial and industrial). XOB/HFB 27 30 FLB/RTB 2. 1.5V undershoots are allowed for 10ns once per cycle EFB 28 29 RSB 3966 drw 02 CAPACITANCE (TA = +25C, f = 1.0 MHz) (1) Symbol Parameter Condition Max. Unit TSSOP (SO56-2, order code: PA) TOP VIEW CIN Input Capacitance VIN = 0V 8 pF COUT Output Capacitance VOUT = 0V 8 pF NOTE: 1. Characterized values, not currently tested. (1) DC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 3.3V0.3V, TA = 0C to +70C Industrial: VCC = 3.3V0.3V, TA = -40C to +85C) Commercial Industrial tA = 15, 20 ns tA = 20 ns Symbol Parameter Min. Max. Min. Max. Unit (1) ILI Input Leakage Current (Any Input) 1 1 1 1 A (2) ILO Output Leakage Current 10 10 10 10 A VOH Output Logic 1 Voltage IOH = 2mA 2.4 2.4 V VOL Output Logic 0 Voltage IOL = 8mA 0.4 0.4 V (3,4) 3.3V ICC1 Active Power Supply Current (both FIFOs) 100 120 mA (3,5) ICC2 Standby Current (R=W=RS=FL/RT=VIH) 5 5 mA NOTES: 330 1. Measurements with 0.4 VIN VCC. 2. R VIH, 0.4 VOUT VCC. TO 3. Tested with outputs open (IOUT = 0). OUTPUT 4. Tested at f = 20 MHz. 5. All Inputs = VCC - 0.2V or GND + 0.2V. PIN 30pF* 510 AC TEST CONDITIONS Input Pulse Levels GND to 3.0V 3966 drw 03 Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V or equivalent circuit Output Reference Levels 1.5V Figure 1. Output Load Output Load See Figure 1 *Includes scope and jib capacitances. 2

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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