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NCP81253MNTBG ON Semiconductor
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NCP81253 5 V MOSFET Driver Compatible with Single-Phase IMVP8 Controllers www.onsemi.com The NCP81253 is a high performance dual MOSFET gate driver in a small 2 mm x 2 mm package, optimized to drive the gates of both MARKING highside and lowside power MOSFETs in a synchronous buck DIAGRAM converter. The driver outputs can be placed into a highimpedance state via the tristate PWM and EN inputs. The NCP81253 comes 1 1 CGM packaged with an integrated boost diode to minimize external DFN8 components. A VCC UVLO function guarantees the outputs are low CASE 506AA when the supply voltage is low. CG = Specific Device Code Features M = Date Code Spaceefficient 2 mm x 2 mm DFN8 Thermallyenhanced Package = PbFree Package VCC Range of 4.5 V to 5.5 V (Note: Microdot may be in either location) Internal Bootstrap Diode 5 V 3stage PWM Input PINOUT DIAGRAM Diode Braking Capability via EN Midstate Adaptive Anticross Conduction Circuit Protects against 8 DRVH BST 1 Crossconduction during FET Turnon and Turnoff Output Disable Control Turns Off both MOSFETs via Enable Pin SW PWM 2 7 VCC Undervoltage Lockout FLAG 9 These devices are Pbfree, Halogenfree/BFRfree and are RoHS 3 6 GND EN compliant DRVL VCC 4 5 Typical Applications Power Solutions for Notebook and Desktop Systems (Top View) ORDERING INFORMATION Device Package Shipping NCP81253MNTBG DFN8 3000 / Tape & (PbFree) Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: December, 2014 Rev. 0 NCP81253/DNCP81253 BST VCC DRVH PWM Logic SW AntiCross Conduction VCC DRVL EN UVLO VCC GND Figure 1. Block Diagram Table 1. PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 BST Floating bootstrap supply pin for the highside gate driver. Connect the external bootstrap capacitor between this pin and SW. 2 PWM Control input: PWM = High DRVH is high, DRVL is low. PWM = Mid DRVH and DRVL are low. PWM = Low DRVH is low, DRVL is high. 3 EN 3state input: EN = High Driver is enabled normal PWM operation. EN = Mid Driver is enabled DRVH and DRVL are low (body diode braking). EN = Low Driver is disabled. 4 VCC Power supply input. Connect a bypass capacitor from this pin to ground. 5 DRVL Lowside gate drive output. Connect to the gate of the lowside MOSFET. 6 GND Bias and reference ground. All signals are referenced to this node. 7 SW Switch node. Connect this pin to the source of the highside MOSFET and drain of the lowside MOSFET. 8 DRVH Highside gate drive output. Connect to the gate of the highside MOSFET. 9 FLAG Thermal flag. There is no electrical connection to the IC. Connect to the ground plane. www.onsemi.com 2
