MT9M114 1/6inch 720p HighDefinition (HD) SystemOnaChip (SOC) Digital Image Sensor www.onsemi.com The MT9M114 from ON Semiconductor is a 1/6-inch 1.26 Mp CMOS digital image sensor with an active-pixel array of 1296 (H) 976(V). It includes sophisticated camera functions such as auto exposure control, auto white balance, black level control, flicker avoidance, and defect correction. It is designed for low light performance. The MT9M114 produces extraordinarily clear, sharp digital pictures, making it the perfect choice for a wide range of ODCSP55 4.7x3.9 applications, including mobile phones, PC and notebook cameras, and CASE 570BP gaming systems. ORDERING INFORMATION Table 1. KEY PERFORMANCE PARAMETERS See detailed ordering and shipping information on page 2 of this data sheet. Parameter Typical Value Optical Format 1/6-inch Internal Master Clock Generated by On-chip Active Pixels 1296 (H) 976 (V) = 1.26 Mp Phase-locked Loop (PLL) Oscillator Pixel Size 1.9 m 1.9 m Electronic Rolling Shutter (ERS), Color Filter Array RGB Bayer Progressive Scan Shutter Electronic Rolling Shutter (ERS) Integrated Image Flow Processor (IFP) for Input Clock Range 654 MHz Single-die Camera Module Automatic Image Correction and Output MIPI Data Rate Maximum 768 Mb/s Enhancement Max. Frame Rate 30 fps Full Res 36.7 fps 720p Arbitrary Image Scaling with Anti-aliasing 75 fps VGA Two-wire Serial Interface Providing Access 120 fps QVGA (Note 2) to Registers and Microcontroller Memory Responsivity 2.24 V/Luxsec (550 nm) Selectable Output Data Format: YCbCr, SNR 37 dB MAX 565RGB, 555RGB, 444RGB, Processed Dynamic Range 70.8 dB Bayer, BT656, RAW8 and RAW8+2-bit Supply Voltage Parallel and MIPI Data Output Digital 1.71.95 V Analog 2.53.1 V Independently Configurable Gamma I/O 1.71.95 V or 2.53.1 V Correction PLL 2.53.1 V Adaptive Polynomial Lens Shading PHY 1.71.95 V Correction Power Consumption 135 mW (Note 1) UVC Interface Operating Temperature Range 30C to 70C Perspective Correction (Ambient) T A Multi-camera Synchronization Chief Ray Angle 27.7 Active Imager Size 2.46 mm (H) 1.85 mm (V), Applications 3.08 mm Diagonal Embedded Notebook, Netbook, and Desktop Package Options Bare Die, CSP Monitor Cameras 1. Power consumption for typical voltages and 720p output. Tethered PC Cameras 2. Reduced FOV. Game Consoles Features Cell Phones, Mobile Devices, and Consumer Superior Low-light Performance Video Communications Ultra-low Power Surveillance, Medical, and Industrial 720p HD Video at 30 fps Applications Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: June, 2019 Rev. 13 MT9M114/DMT9M114 ORDERING INFORMATION Table 2. AVAILABLE PART NUMBERS Part Number Product Description Orderable Product Attribute Description MT9M114D00STCZK24BC1200 1 MP 1/6 SOC Die Sales, 200 m Thickness MT9M114EBLSTCZCR1 1 MP 1/6 SOC CIS Chip Tray without Protective Film MT9M114EBLSTCZCR 1 MP 1/6 SOC CIS Chip Tray without Protective Film See the ON Semiconductor Device Nomenclature documentation, including information on evaluation kits, document (TND310/D) for a full description of the naming please visit our web site at www.onsemi.com. convention used for image sensors. For reference FUNCTIONAL DESCRIPTION The MT9M114 from ON Semiconductor is a 1/6-inch applications. The MT9M114 features ON Semiconductors 1.26 Mp CMOS digital image sensor with an integrated breakthrough low-noise CMOS imaging technology that advanced camera system. This camera system features achieves near-CCD image quality (based on signal-to-noise amicrocontroller (MCU), a sophisticated image flow ratio and low-light sensitivity) while maintaining the processor (IFP), MIPI and parallel output ports (only one inherent size, cost, and integration advantages of CMOS. output port can be used at a time). The microcontroller The MT9M114 can be operated in its default mode or manages all functions of the camera system and sets key programmed for frame size, exposure, gain, and other operation parameters for the sensor core to optimize the parameters. The default mode output is a 720p image size at quality of raw image data entering the IFP. The IFP will be 30 frames per second (fps), assuming a 24 MHz input clock. responsible for processing and enhancing the image. It outputs 8-bit data, using the parallel output port. The entire system-on-a-chip (SOC) has superior low-light performance that is particularly suitable for PC camera ARCHITECTURE OVERVIEW The MT9M114 combines a 1.26 Mp sensor core with an autonomously controls most aspects of operation. IFP to form a stand-alone solution for both image The processed image data is transmitted to the host system acquisition and processing. Both the sensor core and the IFP either through the parallel or MIPI interface. Figure 1 shows have internal registers that can be controlled by the user. In the major functional blocks of the MT9M114. normal operation, an integrated microcontroller Sensor Core Image Flow Processor (IFP) Output Interface MIPI Pixel Array Color Pipeline Parallel Stats Engine Internal Register Bus POR ROM Microcontroller SRAM Two-wire Serial IF System Control Microcontroller Unit (MCU) Figure 1. MT9M114 Block Diagram www.onsemi.com 2 FIFO Formatter