Product Information

MC74HCT259ADTR2G

MC74HCT259ADTR2G electronic component of ON Semiconductor

Datasheet
Latch Addressable 8-CH D-Type 16-Pin TSSOP T/R

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1359: USD 0.3193 ea
Line Total: USD 433.93

0 - Global Stock
MOQ: 1359  Multiples: 1359
Pack Size: 1359
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 23 May to Wed. 29 May

MOQ : 5000
Multiples : 5000

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MC74HCT259ADTR2G
ON Semiconductor

5000 : USD 0.3295

0 - WHS 2


Ships to you between Thu. 23 May to Wed. 29 May

MOQ : 1359
Multiples : 1359

Stock Image

MC74HCT259ADTR2G
ON Semiconductor

1359 : USD 0.3193

0 - WHS 3


Ships to you between Wed. 29 May to Fri. 31 May

MOQ : 1
Multiples : 1

Stock Image

MC74HCT259ADTR2G
ON Semiconductor

1 : USD 1.9767
10 : USD 0.9461
100 : USD 0.5279
250 : USD 0.4904
500 : USD 0.4178
1000 : USD 0.3344
2500 : USD 0.3056

0 - WHS 4


Ships to you between Thu. 23 May to Wed. 29 May

MOQ : 7500
Multiples : 7500

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MC74HCT259ADTR2G
ON Semiconductor

7500 : USD 0.2163

     
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MC74HCT259A 8-Bit Addressable Latch 1-of-8 Decoder with LSTTL Inputs HighPerformance SiliconGate CMOS MC74HCT259A 1 4 LATCH SELECTION TABLE A0 Q0 ADDRESS 2 5 A1 Q1 Address Inputs INPUTS 3 6 A2 Q2 C B A Latch Addressed 7 Q3 NONINVERTING 9 L L L Q0 OUTPUTS Q4 13 10 L L H Q1 DATA IN Q5 L H L Q2 11 Q6 L H H Q3 12 H L L Q4 Q7 H L H Q5 15 H H L Q6 RESET PIN 16 = V CC H H H Q7 14 PIN 8 = GND ENABLE Figure 1. Logic Diagram MAXIMUM RATINGS Symbol Parameter Value Unit This device contains protection circuitry to guard against damage V DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V CC due to high static voltages or electric V DC Input Voltage (Referenced to GND) 0.5 to V + 0.5 V in CC fields. However, precautions must be taken to avoid applications of any V DC Output Voltage (Referenced to GND) 0.5 to V + 0.5 V out CC voltage higher than maximum rated I DC Input Current, per Pin 20 mA voltages to this highimpedance cir- in cuit. For proper operation, V and in I DC Output Current, per Pin 25 mA out V should be constrained to the out range GND (V or V ) V . I DC Supply Current, V and GND Pins 50 mA in out CC CC CC Unused inputs must always be P Power Dissipation in Still Air, SOIC Package 500 mW D tied to an appropriate logic voltage TSSOP Package 450 level (e.g., either GND or V ). CC Unused outputs must be left open. T Storage Temperature 65 to + 150 C stg V ESD Withstand Voltage V ESD Human Body Model (Note 1) >2000 Machine Model (Note 2) >200 I Latchup Performance Above V and Below GND at 100 mA Latchup DD 125C (Note 3) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA / JESD22A114 A. 2. Tested to EIA / JESD22A115 A. 3. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V DC Supply Voltage (Referenced to GND) 4.5 5.5 V CC V , V DC Input Voltage, Output Voltage (Referenced to GND) 0 V V in out CC T Operating Temperature, All Package Types 55 +125 C A t , t Input Rise and Fall Time (Figure 2) 0 500 ns r f

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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