Product Information

MC74AC573NG

MC74AC573NG electronic component of ON Semiconductor

Datasheet
Latches 2-6V Octal Buffer w3 State Outuputs
Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

617: USD 0.6823 ea
Line Total: USD 420.98

0 - Global Stock
MOQ: 617  Multiples: 617
Pack Size: 617

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0 - WHS 1


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 1
Multiples : 1

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MC74AC573NG
ON Semiconductor

1 : USD 0.7371
10 : USD 0.7313
125 : USD 0.6611
750 : USD 0.5265
1500 : USD 0.4972

0 - WHS 2


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 617
Multiples : 617

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MC74AC573NG
ON Semiconductor

617 : USD 0.6823

0 - WHS 3


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 141
Multiples : 1

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MC74AC573NG
ON Semiconductor

141 : USD 0.2104
500 : USD 0.1771
1000 : USD 0.1419
2500 : USD 0.1356
5000 : USD 0.1315
10000 : USD 0.1263

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Type
Logic Family
Polarity
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Package / Case
Packaging
Brand
Mounting Style
Number Of Input Lines
Factory Pack Quantity :
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Additional Infomation About Product

MC74AC573, MC74ACT573 Octal Buffer/Line Driver with 3State Outputs The MC74AC573/74ACT573 is a highspeed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. MC74AC573, MC74ACT573 Functional Description TRUTH TABLE The MC74AC573/74ACT574 contains eight Dtype Inputs Outputs latches with 3state output buffers. When the Latch Enable OE LE D O (LE) input is HIGH, data on the D inputs enters the latches. n n n In this condition the latches are transparent, i.e., a latch L H H H output will change state each time its D input changes. When L H L L LE is LOW the latches store the information that was present L L X O 0 on the D inputs a setup time preceding the HIGHtoLOW transition of LE. The 3state buffers are controlled by the H X X Z Output Enable (OE) input. When OE is LOW, the buffers are H = HIGH Voltage Level enabled. When OE is HIGH the buffers are in the high L = LOW Voltage Level Z = High Impedance impedance mode but this does not interfere with entering X = Immaterial new data into the latches. O = Previous O before LOWtoHIGH Transition of Clock 0 0 D D D D D D D D 0 1 2 3 4 5 6 7 D D D D D D D D Q Q Q Q Q Q Q Q LE LE LE LE LE LE LE LE LE OE O O O O O O O O 0 1 2 3 4 5 6 7 NOTE: That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

ON Semiconductor may also be referenced as

Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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