Product Information

MC10E154FNG

MC10E154FNG electronic component of ON Semiconductor

Datasheet
ON Semiconductor Encoders, Decoders, Multiplexers & Demultiplexers 5V ECL 5-Bit 2:1 Mux

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 57
Multiples : 57

Stock Image

MC10E154FNG
ON Semiconductor

57 : USD 7.723
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

Stock Image

MC10E154FNG
ON Semiconductor

1 : USD 11.0968
10 : USD 10.0314
25 : USD 9.5667
100 : USD 8.381
250 : USD 7.9956
500 : USD 7.5977
1000 : USD 7.1998
2500 : USD 7.1998
5000 : USD 6.6526
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Family
Number of Bits
Number of Input Lines
Number of Output Lines
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Number Of Circuits
Series
Brand
Logic Type
Factory Pack Quantity :
Function
Height
Length
Technology
Width
Cnhts
High Level Output Current
Hts Code
Low Level Output Current
Maximum Clock Frequency
Mxhts
Operating Supply Voltage
Product Type
Subcategory
Taric
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MC10E154, MC100E154 5V ECL 5-Bit 2:1 Mux-Latch Description The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is MC10E154, MC100E154 D D D D V Q Q 4b 4a 3b 3a CCO 4 4 25 24 23 22 21 20 19 SEL Q 26 18 3 LEN1 Q 17 27 3 LEN2 28 16 V CC V 1 15 Q EE 2 28-Lead PLCC (Top View) MR 2 14 Q 2 D 3 13 Q 0a 1 D 0b 4 Q 12 1 56 7 8 9 10 11 D D D D V Q Q 1a 1b 2a 2b CCO 0 0 * All V and V pins are tied together on the die. CC CCO Warning: All V , V , and V pins must be externally CC CCO EE connected to Power Supply to guarantee proper operation. Figure 1. 28Lead Pinout Q D Q Table 1. PIN DESCRIPTION 0a 0 D MUX EN Q PIN FUNCTION Q D R 0 SEL 0b D D ECL Input Data a 0a 4a Q D Q 1a 1 D D ECL Input Data b D 0b 4b MUX EN Q Q SEL ECL Data Select Input D SEL R 1 1b LEN1, LEN2 ECL Latch Enables Q Q D 2 2a D MUX MR ECL Master Reset EN Q Q D SEL R 2 Q Q , Q Q ECL Differential Outputs 2b 0 4 0 4 V , V Positive Supply CC CCO Q D 3a Q 3 MUX D V Negative Supply EE EN Q Q D SEL R 3 3b Table 2. TRUTH TABLE D Q 4a Q 4 MUX D SEL DATA EN Q Q SEL D R 4 4b H a L b SEL LEN1 LEN2 MR Figure 2. Logic Diagram

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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