Product Information

MC100EL91DWR2G

MC100EL91DWR2G electronic component of ON Semiconductor

Datasheet
Translator PECL to ECL 20-Pin SOIC W T/R

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1000: USD 6.075 ea
Line Total: USD 6075

0 - Global Stock
MOQ: 1000  Multiples: 1000
Pack Size: 1000
Availability Price Quantity
0 - WHS 1


Ships to you between Fri. 10 May to Thu. 16 May

MOQ : 1000
Multiples : 1000

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MC100EL91DWR2G
ON Semiconductor

1000 : USD 7.2563

0 - WHS 2


Ships to you between Fri. 10 May to Thu. 16 May

MOQ : 56
Multiples : 56

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MC100EL91DWR2G
ON Semiconductor

56 : USD 7.5526

0 - WHS 3


Ships to you between Thu. 16 May to Mon. 20 May

MOQ : 1
Multiples : 1

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MC100EL91DWR2G
ON Semiconductor

1 : USD 10.7295
10 : USD 9.867
25 : USD 9.407
50 : USD 8.5905
100 : USD 8.027
250 : USD 7.3945
500 : USD 7.038
1000 : USD 6.716

0 - WHS 4


Ships to you between Fri. 10 May to Thu. 16 May

MOQ : 1000
Multiples : 1000

Stock Image

MC100EL91DWR2G
ON Semiconductor

1000 : USD 6.075

     
Manufacturer
Product Category
RoHS - XON
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Type
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Maximum Operating Temperature
Mounting Style
Minimum Operating Temperature
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MC100EL91 5 V Triple PECL Input to -5 V ECL Output Translator Description The MC100EL91 is a triple PECL input to ECL output translator. The device receives standard voltage differential PECL signals, www.onsemi.com determined by the V supply level, and translates them to differential CC 5 V ECL output signals. (For translation of LVPECL to 3.3 V ECL output, see MC100LVEL91.) To accomplish the level translation, the EL91 requires three power rails. The V supply should be connected to the positive supply, and CC the V pin should be connected to the negative power supply. The EE GND pins are connected to the system ground plane. Both V and EE SOIC20 WB V should be bypassed to ground via 0.01F capacitors. CC DW SUFFIX Under open input conditions, the D input will be biased at V /2 CC CASE 751D05 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability. The V pin, an internally generated voltage supply, is available to BB MARKING DIAGRAM* this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. BB 20 V may also rebias AC coupled inputs. When used, decouple V BB BB and V via a 0.01F capacitor and limit current sourcing or sinking CC to 0.5 mA. When not used, V should be left open. 100EL91 BB AWLYYWWG Features 670 ps Typical Propagation Delay 1 ESD Protection: > 2 kV Human Body Model The 100 Series Contains Temperature Compensation A = Assembly Location Operating Range: WL = Wafer Lot YY = Year V = 4.75 V to 5.5 V CC WW = Work Week V = 4.2 V to 5.5 V; GND = 0 V EE G = Pb-Free Package Internal Input Pulldown Resistors Q Output will Default LOW with Inputs Open or at GND *For additional marking information, refer to Application Note AND8002/D. Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: 3 (Pb-Free) For Additional Information, see Application Note AND8003/D ORDERING INFORMATION Flammability Rating: UL 94 V0 @ 0.125 in, Device Package Shipping Oxygen Index: 28 to 34 MC100EL91DWG SOIC20 WB 38 Units/Tube Transistor Count = 282 devices (Pb-Free) These Devices are Pb-Free, Halogen Free and are RoHS Compliant MC100EL91DWR2G SOIC20 WB 1000/Tape & Reel (Pb-Free) For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 8 MC100EL91/DMC100EL91 V Q0 Q0 GND Q1 Q1 GND Q2 Q2 V CC CC 20 19 18 17 16 15 14 13 12 11 Table 1. PIN DESCRIPTION ECL ECL ECL PIN FUNCTION Dn, Dn PECL Inputs Qn, Qn ECL Outputs PECL V PECL Reference Voltage Output BB PECL PECL PECL V Positive Supply CC V Negative Supply EE GND Ground 1 2 3 4 5678 9 10 V D0 D0 D1 D1 D2 D2 V CC EE **All V pins are tied together on the die. CC Warning: All V , V , and GND pins must be externally CC EE connected to Power Supply to guarantee proper operation. Figure 1. 20-Lead Pinout (Top View) and Logic Diagram Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Power Supply GND = 0 V 8 to 0 V CC V NECL Power Supply GND = 0 V 8 to 0 V EE V PECL Input Voltage GND = 0 V V V 6 to 0 V I I CC I Output Current Continuous 50 mA out Surge 100 I PECL V Sink/Source 0.5 mA BB BB T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg  Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC20 WB 90 C/W JA 500 lfpm 60  Thermal Resistance (Junction-to-Case) Standard Board SOIC20 WB 30 to 35 C/W JC T Wave Solder (Pb-Free) <2 to 3 sec @ 248C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 PECL V BB PECL V BB

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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