Product Information

LE25U81AQETXG

LE25U81AQETXG electronic component of ON Semiconductor

Datasheet
Flash Serial-SPI 2.5V 8M-bit 1M x 8 T/R
Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

405: USD 1.0404 ea
Line Total: USD 421.36

0 - Global Stock
MOQ: 405  Multiples: 405
Pack Size: 405

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1


Ships to you between Mon. 20 May to Fri. 24 May

MOQ : 1
Multiples : 1

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LE25U81AQETXG
ON Semiconductor

1 : USD 0.8703

0 - WHS 2


Ships to you between Mon. 20 May to Fri. 24 May

MOQ : 1
Multiples : 1

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LE25U81AQETXG
ON Semiconductor

1 : USD 1.0404

0 - WHS 3


Ships to you between Fri. 24 May to Tue. 28 May

MOQ : 1
Multiples : 1

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LE25U81AQETXG
ON Semiconductor

1 : USD 2.2628
10 : USD 0.8652
25 : USD 0.8213
50 : USD 0.816
100 : USD 0.7374
250 : USD 0.7322
500 : USD 0.7208
1000 : USD 0.7063
2000 : USD 0.697

0 - WHS 4


Ships to you between Mon. 20 May to Fri. 24 May

MOQ : 2000
Multiples : 2000

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LE25U81AQETXG
ON Semiconductor

2000 : USD 0.9832

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
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Memory Size
Maximum Clock Frequency
Interface Type
Organisation
Timing Type
Data Bus Width
Supply Voltage - Min
Supply Voltage - Max
Supply Current - Max
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Maximum Operating Temperature
Packaging
Architecture
Speed
Memory Type
Operating Temperature Range
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Additional Infomation About Product

Ordering number : ENA2199 LE25U81AQE CMOS LSI LE25U81AQE Figure 2 Block Diagram 8M Bit X- Flash EEPROM DECODER ADDRESS Cell Array BUFFERS & LATCHES Y-DECODER I/O BUFFERS CONTROL & LOGIC DATA LATCHES SERIAL INTERFACE CS SI/SIO0 SO/SIO1 WP SCK HOLD Table 1 Pin Description Symbol Pin Name Description SCK Serial clock This pin controls the data input/output timing. The input data and addresses are latched synchronized to the rising edge of the serial clock, and the data is output synchronized to the falling edge of the serial clock. SI/SIO0 Serial data input The data and addresses are input from this pin, and latched internally synchronized to the rising edge of the / Serial data input output serial clock. It changes into the output pin at Dual Output and it changes into the input output pin at Dual I/O. SO/SIO1 Serial data input The data stored inside the device is output from this pin synchronized to the falling edge of the serial clock. / Serial data input output It changes into the output pin at Dual Output and it changes into the input output pin at Dual I/O. CS Chip select The device becomes active when the logic level of this pin is low it is deselected and placed in standby status when the logic level of the pin is high. WP Write protect The status register write protect (SRWP) takes effect when the logic level of this pin is low. HOLD Hold Serial communication is suspended when the logic level of this pin is low. V Power supply This pin supplies the 2.3 to 2.7V supply voltage. DD V Ground This pin supplies the 0V supply voltage. SS No.A2199-2/22

HS Compliance

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)

ON Semiconductor may also be referenced as

Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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