R ESD8011 ESD Protection Diodes Ultra Low Capacitance ESD Protection Diode for High Speed Data Line The ESD8011 ESD protection diodes are designed to protect high www.onsemi.com speed data lines from ESD. Ultralow capacitance and low ESD clamping voltage make this device an ideal solution for protecting MARKING voltage sensitive high speed data lines. DIAGRAM Features PIN 1 Ultra Low Capacitance (0.10 pF Typ, I/O to GND) X3DFN2 M CASE 152AF Protection for the Following IEC Standards: IEC 6100042 (Level 4) R = Specific Device Code Low ESD Clamping Voltage (Rotated 90 clockwise) These Devices are PbFree, Halogen Free/BFR Free and are RoHS M = Date Code Compliant Typical Applications PIN CONFIGURATION AND SCHEMATIC USB 3.x MHL 2.0 SATA/SAS 12 PCI Express MAXIMUM RATINGS (T = 25C unless otherwise noted) J Rating Symbol Value Unit Operating Junction Temperature Range T 55 to +125 C J Storage Temperature Range T 55 to +150 C stg Lead Solder Temperature T 260 C L Maximum (10 Seconds) IEC 6100042 Contact (ESD) ESD 20 kV ORDERING INFORMATION IEC 6100042 Air (ESD) ESD 20 kV See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Maximum Peak Pulse Current I 3.6 A pp 8/20 s T = 25C A Maximum Peak Pulse Power P 34 W pk 8/20 s T = 25C A Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2016 Rev. 4 ESD8011/D =ESD8011 ELECTRICAL CHARACTERISTICS I (T = 25C unless otherwise noted) A I PP Symbol Parameter R DYN V Working Peak Voltage RWM I HOLD I Maximum Reverse Leakage Current V R RWM I T V V Breakdown Voltage I V V V V BR T BR C RWM HOLD I R I V V R V V BR HOLD RWM C I Test Current I T T I V Holding Reverse Voltage HOLD HOLD I Holding Reverse Current HOLD R DYN R Dynamic Resistance DYN I PP I Maximum Peak Pulse Current PP V = V + (I * R ) C HOLD PP DYN V Clamping Voltage I C PP V = V + (I * R ) C HOLD PP DYN ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise specified) A Parameter Symbol Conditions Min Typ Max Unit Reverse Working Voltage V I/O Pin to GND 5.5 V RWM Breakdown Voltage V I = 1 mA, I/O Pin to GND 6.5 7.3 V BR T Reverse Leakage Current I V = 5.5 V, I/O Pin to GND 1.0 A R RWM Reverse Holding Voltage V I/O Pin to GND 2.05 V HOLD Holding Reverse Current I I/O Pin to GND 17 mA HOLD Clamping Voltage V 11.0 V I = 8 A IEC6100042 Level 2 Equivalent C PP TLP (Note 2) (4 kV Contact, 8 kV Air) I = 16 A 19.0 PP IEC6100042 Level 2 Equivalent (8 kV Contact, 16 kV Air) Dynamic Resistance R Pin1 to Pin2 1.0 DYN Pin2 to Pin1 1.0 Junction Capacitance C V = 0 V, f = 1 MHz 0.10 0.20 pF J R Series Inductance L V = 0 V 0.3 nH S R Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. For test procedure see Figure 5 and application note AND8307/D. 2. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z = 50 , t = 100 ns, t = 4 ns, averaging window t = 30 ns to t = 60 ns. 0 p r 1 2 www.onsemi.com 2