SPC5668GF1AVMG

Freescale Semiconductor Document Number: MPC5668X Rev. 6, 03/2011 Data Sheet: Technical Data MPC5668x MAPBGA208 MAPBGA256 17 mm x 17 mm 17 mm x 17 mm MPC5668x Microcontroller Data Sheet MPC5668x features: Cross-Triggering Unit (MPC5668E only) Internal conversion triggering for ADC 32-bit CPU core complex (e200z650) Triggerable by internal timers or eMIOS200 Compliant with Power Architecture embedded category Deserial Serial Peripheral Interface (DSPI) 32 KB unified cache with line locking and eight-entry Four individual DSPI modules store buffer16 Full duplex, synchronous transfers Execution speed static to 116 MHz Master or slave operation 32-bit I/O processor (e200z0) 2 Inter-IC communication (I C) interface Execution speed static to 1/2 CPU core speed (58 MHz) 2 Four individual I C modules 2 MB on-chip flash Multi-master operation Supports read during program and erase operations, and Serial Communication Interface (eSCI) module multiple blocks allowing EEPROM emulation Two-channel DMA interface 512 KB + 80 KB (592 KB) on-chip ECC SRAM Configurable as LIN bus master (MPC5668G) eMIOS200 timed input/output 128 KB on-chip ECC SRAM (MPC5668E) 24 channels, 16-bit timers (MPC5668G) 16-entry Memory Protection Unit (MPC5668E only) 32 channels, 16-bit timers (MPC5668E) Direct memory access controller Controller Area Network (FlexCAN) module 16-channel on MPC5668G Compliant with CAN protocol specification, Version 32-channel on MPC5668E 2.0B active Fast ethernet controller 64 mailboxes, each configurable as transmit or receive Supports 10-Mbps and 100-Mbps IEEE 802.3 MII, Dual-channel FlexRay controller 10-Mbps 7-wire interface Full implementation of FlexRay Protocol Specification IEEE 802.3 MAC (compliant with IEEE 802.3 1998 2.1, RevA edition) 128 message buffers Media Local Bus (MLB) interface (MPC5668G only) JTAG controller (MPC5668G only) Supports 16 logical channels, max speed 1024 Fs Compliant with the IEEE 1149.1-2001 Interrupt controller (INTC) supports 316 external interrupt Nexus Development Interface (NDI) vectors (22 are reserved) Available in 256 MAPBGA package only System clocks Compliant with IEEE-ISTO 5001-2003 Frequency-modulated phase-locked loop (FMPLL) Nexus class 3 development support on e200z650 440MHz crystal oscillator (XTAL) Nexus class 2+ development support on e200z0 32 kHz crystal oscillator (XTAL) Internal voltage regulator allows operation from single Dedicated 16 MHz and 128 kHz internal RC oscillators 3.3 V or 5 V supply Analog to Digital Converter (ADC) module 10-bit A/D resolution 32 external channels 36 internal channels (MPC5668G) 64 internal channels (MPC5668E) This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. Freescale Semiconductor, Inc., 2010, 2011. All rights reserved.Table of Contents 1 Ordering Information .3 4.8 Low Voltage Characteristics 36 1.1 Orderable Parts 3 4.9 Oscillators Electrical Characteristics 36 2 MPC5668x Block Diagrams .4 4.10 FMPLL Electrical Characteristics . 38 3 Pin Assignments 6 4.11 ADC Electrical Characteristics . 39 3.1 208-ball MAPBGA Pin Assignments 6 4.12 Flash Memory Electrical Characteristics . 39 3.2 256-ball MAPBGA Pin Assignments 7 4.13 Pad AC Specifications . 40 3.3 Pin Muxing and Reset States .8 4.14 AC Timing 43 3.3.1 Power and Ground Supply Summary 25 4.14.1 Reset and Boot Configuration Pins . 43 4 Electrical Characteristics 26 4.14.2 External Interrupt (IRQ) and Non-Maskable 4.1 Maximum Ratings .26 Interrupt (NMI) Pins . 43 4.2 Thermal Characteristics 27 4.14.3 JTAG (IEEE 1149.1) Interface . 44 4.2.1 General Notes for Specifications at Maximum 4.14.4 Nexus Debug Interface . 47 Junction Temperature 27 4.14.5 Enhanced Modular I/O Subsystem (eMIOS) 49 4.3 ESD Characteristics .30 4.14.6 Deserial Serial Peripheral Interface (DSPI) . 50 4.4 VRC Electrical Specifications 30 4.14.7 MLB Interface 55 4.5 DC Electrical Specifications .30 4.14.8 Fast Ethernet Interface 57 4.6 Operating Current Specifications 32 5 Package Characteristics 61 4.7 I/O Pad Current Specifications .34 5.1 Package Mechanical Data 61 4.7.1 I/O Pad V Current Specifications 35 6 Revision History 65 DD33 Table 1. MPC5668G/MPC5668E Comparison Feature MPC5668G MPC5668E Package 208 MAPBGA 256 MAPBGA 208 MAPBGA 256 MAPBGA RAM with ECC 592 KB 128 KB MPU No 16 entry DMA 16-channel 32-channel Ethernet (FEC) Yes No MediaLB (MLB-DIM) Yes No FlexRay Yes (128 Message Buffers) No ADC (10-bit) 36 internal channels 64 internal channels Supports 32 external channels Supports 32 external channels Total Timer I/O (eMIOS200) 24 channels, 16-bit 32 channels, 16-bit Cross Trigger Unit (CTU) No Yes SCI (eSCI) 6 12 SPI (DSPI) 4 4 CAN (FlexCAN) 6 5 2 IC4 4 Nexus3 Debug (e200Z6) Supported on 256BGA Supported on 256BGA Nexus2+ Debug (e200Z0) emulation package emulation package MPC5668x Microcontroller Data Sheet, Rev. 6 2 Freescale Semiconductor