Product Information

HEF4030BP,652

HEF4030BP,652 electronic component of NXP

Datasheet
Logic Gates QUAD XCLSVE-OR GATE

Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.2925 ea
Line Total: USD 0.29

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 16 May to Wed. 22 May

MOQ : 1
Multiples : 1
1 : USD 0.2925
5 : USD 0.2808
50 : USD 0.2398
250 : USD 0.1837
1000 : USD 0.1591
2500 : USD 0.1545

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Brand
Factory Pack Quantity :
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HEF4030B Quad 2-input EXCLUSIVE-OR gate Rev. 5 16 December 2015 Product data sheet 1. General description The HEF4030B is a quad 2-input EXCLUSIVE-OR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +125 C Complies with JEDEC standard JESD 13-B Inputs and outputs are protected against electrostatic effects 3. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C Type number Package Name Description Version HEF4030BT SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1 4. Functional diagram < % < % < % < < % % DDD PQ D Fig 1. Functional diagram Fig 2. Logic diagram (one gate)HEF4030B Nexperia Quad 2-input EXCLUSIVE-OR gate 5. Pinning information 5.1 Pinning +() % 9 % % < < < < % % 9 6 6 DDD Fig 3. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A 1, 5, 8, 12 data input 1B, 2B, 3B, 4B 2, 6, 9, 13 data input 1Y, 2Y, 3Y, 4Y 3, 4, 10, 11 data output V 7 ground (0 V) SS V 14 supply voltage DD 6. Functional description 1 Table 3. Functional table Input Output nA nB nY LLL LH H HL H HHL 1 H = HIGH voltage level L = LOW voltage level HEF4030B All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 5 16 December 2015 2 of 11

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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