CBTL12131ET,518

CBTL12131 DisplayPort multiplexer for bidirectional video in all-in-one computer systems Rev. 1 25 February 2011 Product data sheet 1. General description CBTL12131 is an integrated DisplayPort high-speed path switch/multiplexer that allows all-in-one computer systems to efficiently manage path switching between different display modes of operation. With the CBTL12131, video can be routed either from one DisplayPort source (GPU1) to an integrated DisplayPort panel and simultaneously from a second DisplayPort source (GPU2) to an external DisplayPort sink or from an external DisplayPort source to the integrated DisplayPort panel. The device is configured as four main Ports A through D, each providing four high-speed differential lanes for DisplayPort Main Link (ML) channels, one high-speed differential lane for the DisplayPort AUX channel, and one single-ended lane for the HPD (Hot Plug Detect) signal. One port (Port A) provides an additional alternate lane for the AUX channel, in order to allow bypassing of external AC-coupling capacitors for support of the DDC channel in case an external connected sink is a ++DP type cable adapter. For the path supporting the external source to integrated DisplayPort panel mode, a programmable equalizer is provided which allows compensation for channel loss that the external source or internal sink are unable to adequately compensate for. The equalizer is self-biasing and is programmable to five gain-frequency curves, of which one is a flat response and four are active equalization. The equalizer output can also be set to one of two levels of pre-emphasis (including flat), and also differential swing level can be set to one of two levels. All options (EQ, pre-emphasis, level) are easily programmed using board-strapping (resistor, short or open) of three unique Quinary Input programming pins. The CBTL12131 includes additional features that support use of the external DisplayPort connector in both directions: either an external sink (monitor or cable adapter) or external source (notebook computer) can be connected, while CBTL12131 configures the direction and termination of the related signals accordingly. The port facing the external DisplayPort connector (Port B) is equipped with dedicated sensing circuitry which detects and reports the status of the HPD and AUX lines, to support the system controller in determining and setting the proper connection status. The AUX channel of Port B also has switchable integrated termination, to allow the system controller to apply the correct DC termination in case an external DisplayPort source is connected. Moreover, it affords the system controller the means to detect the type of system (sink, source or all-in-one computer) connected at Port B, and apply the proper termination required in each scenario. The CBTL12131 is powered from a single 3.3 V power supply, consumes very little current while providing low insertion loss and low return loss high-speed differential switch channels suitable for use in DisplayPort v1.1a interconnect. All switch and configuration settings can be performed by board-strapping or driving simple CMOS inputsno software or bus configuration is required. CBTL12131 is available in a 6 mm 6mm CBTL12131 NXP Semiconductors DisplayPort multiplexer for bidirectional video TFBGA64 package with 0.5 mm ball pitch owing to its high level of integration and versatility, it is eminently suitable for use in computers employing bidirectional DisplayPort video. 2. Features and benefits 2.1 High-speed DisplayPort Main Link multiplexing Switch path topologies supporting: dual through mode (two GPUs to two displays simultaneously) external source mode (external source to internal display) Supports DisplayPort v1.1a at 2.7 Gbit/s High-bandwidth analog pass-gate technology Configurable equalization in external source mode path Pre-emphasis level control for equalizer in external source mode path Very low intra-pair differential skew of < 5 ps Very low inter-pair skew of < 180 ps 2.2 DDC and AUX multiplexing Switch path topologies supporting: dual through mode (two GPUs to two displays) external source mode (external source to internal display) AC coupling bypass mode on Port A (for external ++DP sink) Supports DisplayPort v1.1a AUX channel 2 Supports DDC/I C-bus multiplexing High-bandwidth analog pass-gate technology 2.3 HPD channel management Active logic management of HPD signals Bidirectional HPD I/O for external connector (Port B) HPD input for integrated DisplayPort display (Port D) Two HPD outputs to both GPUs, one for internal (Port C) and one for external video (Port A) 5 V tolerance on all HPD inputs 3.3 V LVTTL logic output levels for all HPD outputs Internal 200 k pull-down resistor on Port B and Port D HPD input ensures default LOW when no sink is connected 2.4 Link state detection, configuration and reporting Detection of DC state of AUX P and AUX N lines of external display (Port B) Filtering of HPD interrupt pulse from external display (Port B) Reporting of detected/filtered Port B AUX and HPD states via CMOS outputs (to external system controller) AUX channel bias control inputs for Port B to allow configuration as source or sink CBTL12131 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 25 February 2011 2 of 28