Product Information

ADC1415S125/DB,598

ADC1415S125/DB,598 electronic component of NXP

Datasheet
BOARD DEMO FOR ADC1415S125
Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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Additional Infomation About Product

ADC1415S series Single 14-bit ADC 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer CMOS or LVDS DDR digital outputs Rev. 4 17 December 2010 Product data sheet 1. General description The ADC1415S is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performance and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1415S is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. The ADC1415S supports the Low Voltage Differential Signalling (LVDS) Double Data Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the user to easily configure the ADC. The device also includes a SPI programmable full-scale to allow flexible input voltage range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the baseband to input frequencies of 170 MHz or more, the ADC1415S is ideal for use in communications, imaging and medical applications - especially in high Intermediate Frequency (IF) applications thanks to the integrated input buffer. The input buffer ensures that the input impedance remains constant and low and the performance consistent over a wide frequency range. 2. Features and benefits SNR, 72 dBFS SFDR, 86 dBc Input bandwidth, 600 MHz Sample rate up to 125 Msps Power dissipation, 635 mW at 80 Msps, including analog input buffer 14-bit pipelined ADC core Serial Peripheral Interface (SPI) Clock input divided by 2 for less jitter Duty cycle stabilizer contribution Integrated input buffer Fast OuT-of-Range (OTR) detection Flexible input voltage range: 1 V (p-p) to Offset binary, twos complement, gray 2 V (p-p) code CMOS or LVDS DDR digital outputs Power-down mode and Sleep mode Pin compatible with ADC1215S series, HVQFN40 package ADC1015S series and the ADC1115S125ADC1415S series NXP Semiconductors Single 14-bit ADC input buffer CMOS or LVDS DDR digital outputs 3. Applications Wireless and wired broadband Spectral analysis communications Portable instrumentation Ultrasound equipment Imaging systems Software defined radio Digital predistortion loop, power amplifier linearization 4. Ordering information Table 1. Ordering information Type number f (Msps) Package s Name Description Version ADC1415S125HN/C1 125 HVQFN40 plastic thermal enhanced very thin quad flat package no SOT618-6 leads 40 terminals body 6 6 0.85 mm ADC1415S105HN/C1 105 HVQFN40 plastic thermal enhanced very thin quad flat package no SOT618-6 leads 40 terminals body 6 6 0.85 mm ADC1415S080HN/C1 80 HVQFN40 plastic thermal enhanced very thin quad flat package no SOT618-6 leads 40 terminals body 6 6 0.85 mm ADC1415S065HN/C1 65 HVQFN40 plastic thermal enhanced very thin quad flat package no SOT618-6 leads 40 terminals body 6 6 0.85 mm ADC1415S SER All information provided in this document is subject to legal disclaimers. NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 17 December 2010 2 of 42

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