Product Information

XC7SET125GM,115

XC7SET125GM,115 electronic component of Nexperia

Datasheet
Inverters BUS BUFFER/LINE DRIVER; 3-S
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

5000: USD 0.2775 ea
Line Total: USD 1387.5

0 - Global Stock
MOQ: 5000  Multiples: 5000
Pack Size: 5000

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Ships to you between Fri. 31 May to Tue. 04 Jun

MOQ : 5000
Multiples : 5000
5000 : USD 0.2551
10000 : USD 0.2551
25000 : USD 0.2468

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Additional Infomation About Product

XC7SET125 Bus buffer/line driver 3-state Rev. 4 19 January 2022 Product data sheet 1. General description XC7SET125 is a high-speed Si-gate CMOS devices. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state. 2. Features and benefits Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays TTL input levels ESD protection: HBM JESD22-A114E: exceeds 2000 V MM JESD22-A115-A: exceeds 200 V CDM JESD22-C101C: exceeds 1000 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version XC7SET125GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package SOT353-1 5 leads body width 1.25 mm XC7SET125GV -40 C to +125 C SC-74A plastic surface-mounted package 5 leads SOT753 XC7SET125GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 4. Marking Table 2. Marking codes Type number Marking 1 XC7SET125GW gM XC7SET125GV g25 XC7SET125GM gM 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code.Nexperia XC7SET125 Bus buffer/line driver 3-state 5. Functional diagram 2 A Y 4 Y A 2 4 1 OE 1 EN OE mna118 mna119 mna120 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning XC7SET125 XC7SET125 OE 1 6 V CC OE 1 5 V CC A 2 5 n.c. A 2 GND 3 4 Y GND 3 4 Y 001aak127 001aak126 Transparent top view Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) Fig. 5. Pin configuration SOT886 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description SOT353-1 (TSSOP5) and SOT886 (XSON6) SOT753 (SC-74A) OE 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected V 5 6 supply voltage CC 7. Functional description Table 4. Function table H = HIGH voltage level L = LOW voltage level X = dont care Z = high-impedance OFF-state. Inputs Output OE A Y L L L L H H H X Z XC7SET125 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 4 19 January 2022 2 / 13

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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