Product Information

74LVC74AD,118

74LVC74AD,118 electronic component of Nexperia

Datasheet
IC: digital; D flip-flop; Ch: 2; CMOS,TTL; LVC; SMD; SO14; Reel,tape
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2500: USD 0.0997 ea
Line Total: USD 249.25

7275 - Global Stock
Ships to you between
Fri. 24 May to Thu. 30 May
MOQ: 2500  Multiples: 2500
Pack Size: 2500

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7275 - WHS 1


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 2500
Multiples : 2500

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74LVC74AD,118
Nexperia

2500 : USD 0.0997
7500 : USD 0.0997
12500 : USD 0.0997
25000 : USD 0.0997
50000 : USD 0.0997

106 - WHS 2


Ships to you between
Fri. 31 May to Wed. 05 Jun

MOQ : 5
Multiples : 5

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74LVC74AD,118
Nexperia

5 : USD 0.2549
50 : USD 0.2059
150 : USD 0.1848
500 : USD 0.1586
2500 : USD 0.147
5000 : USD 0.14

11405 - WHS 3


Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 1
Multiples : 1

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74LVC74AD,118
Nexperia

1 : USD 0.4865
10 : USD 0.3737
100 : USD 0.2093
1000 : USD 0.161
2500 : USD 0.1139
10000 : USD 0.1127
50000 : USD 0.1115
100000 : USD 0.1104

5226 - WHS 4


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 90
Multiples : 1

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74LVC74AD,118
Nexperia

90 : USD 0.1254
100 : USD 0.1226
1000 : USD 0.1202

1096 - WHS 5


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 69
Multiples : 1

Stock Image

74LVC74AD,118
Nexperia

69 : USD 0.6387
100 : USD 0.6367
250 : USD 0.6239

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Propagation Delay Time
High Level Output Current
Supply Voltage - Min
Supply Voltage - Max
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Maximum Operating Temperature
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Additional Infomation About Product

74LVC74A Dual D-type flip-flop with set and reset positive-edge trigger Rev. 9 20 August 2021 Product data sheet 1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. 2. Features and benefits 5 V tolerant inputs for interlacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC74AD -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVC74APW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74LVC74ABQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mmNexperia 74LVC74A Dual D-type flip-flop with set and reset positive-edge trigger 4. Functional diagram 1SD 4 SD 1Q 1D 2 Q D 5 1CP 3 CP FF 1Q Q 6 RD 4 4 10 S 5 1RD 3 1 C1 1SD 2SD 2 2SD 1D 6 10 SD 1 2 1D 1Q 5 R D Q 12 2D 2Q 9 SD 2Q 2D 3 1CP 12 D Q 9 CP 10 11 2CP FF S 9 2CP 1Q 6 11 CP 11 Q C1 8 FF 2Q 2Q 12 RD Q 8 1D 8 13 RD 1RD 2RD R 2RD 1 13 mna420 mna418 mna419 13 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Functional diagram Q C C C C C C D Q C C RD SD mna421 CP C C Fig. 4. Logic diagram for one flip-flop 74LVC74A All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 9 20 August 2021 2 / 16

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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